From: Thierry Reding treding@nvidia.com
Some boards, most notably those with a PCIe ethernet NIC, require this to avoid cache coherency problems. Since the option adds very little code and overhead enable it across all Tegra generations. Other drivers may also start supporting this functionality at some point, so enabling it now will automatically reap the benefits later on.
Acked-by: Stephen Warren swarren@nvidia.com Signed-off-by: Thierry Reding treding@nvidia.com Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v4: None Changes in v3: None
include/configs/tegra-common.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 0eb2d6b..3ce566c 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -50,6 +50,8 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE #endif +#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ + /* * NS16550 Configuration */