On 13/08/2019 21:31, Eddie James wrote:
Add nodes for the Aspeed SD controllers with their necessary properties.
Signed-off-by: Eddie James eajames@linux.ibm.com
Reviewed-by: Cédric Le Goater clg@kaod.org
Thanks,
C.
arch/arm/dts/ast2500-evb.dts | 14 ++++++++++++++ arch/arm/dts/ast2500-u-boot.dtsi | 16 ++++++++++++++++ 2 files changed, 30 insertions(+)
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts index ebf44fd..4796ed4 100644 --- a/arch/arm/dts/ast2500-evb.dts +++ b/arch/arm/dts/ast2500-evb.dts @@ -59,3 +59,17 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mac2link_default &pinctrl_mdio2_default>; };
+&sdhci0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sd1_default>;
+};
+&sdhci1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sd2_default>;
+}; diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi index 7f80bad..8ac4215 100644 --- a/arch/arm/dts/ast2500-u-boot.dtsi +++ b/arch/arm/dts/ast2500-u-boot.dtsi @@ -34,6 +34,22 @@
apb { u-boot,dm-pre-reloc;
sdhci0: sdhci@1e740100 {compatible = "aspeed,ast2500-sdhci";reg = <0x1e740100>;#reset-cells = <1>;clocks = <&scu BCLK_SDCLK>;resets = <&rst AST_RESET_SDIO>;};sdhci1: sdhci@1e740200 {compatible = "aspeed,ast2500-sdhci";reg = <0x1e740200>;#reset-cells = <1>;clocks = <&scu BCLK_SDCLK>;resets = <&rst AST_RESET_SDIO>;};};
};