
On Sat, Jun 3, 2017 at 3:27 PM, Álvaro Fernández Rojas noltari@gmail.com wrote:
This driver manages the SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com
v3: rename BCM6338 SPI driver to BCM6348 v2: add spi alias
arch/mips/dts/brcm,bcm6338.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6338.dtsi b/arch/mips/dts/brcm,bcm6338.dtsi index eb51a43..0cab44c 100644 --- a/arch/mips/dts/brcm,bcm6338.dtsi +++ b/arch/mips/dts/brcm,bcm6338.dtsi @@ -12,6 +12,10 @@ / { compatible = "brcm,bcm6338";
aliases {
spi0 = &spi;
};
cpus { reg = <0xfffe0000 0x4>; #address-cells = <1>;
@@ -109,6 +113,19 @@ status = "disabled"; };
spi: spi@fffe0c00 {
compatible = "brcm,bcm6348-spi";
reg = <0xfffe0c00 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&periph_clk BCM6338_CLK_SPI>;
resets = <&periph_rst BCM6338_RST_SPI>;
spi-max-frequency = <20000000>;
num-cs = <4>;
space?
status = "disabled";
};
As per dts(or with new node) additions/update we generally rely with Linux for maximum possible extent So can you try to add this in Linux first so-that we can have proper sync.
thanks!