
29 Aug
2017
29 Aug
'17
4:56 a.m.
On Tue, Aug 22, 2017 at 08:15:14AM -0700, Bin Meng wrote:
So far cache operations are only applied on the submission queue and completion queue, but they are missing in other places like identify and block read/write routines.
In order to correctly operate on the caches, the DMA buffer passed to identify routine must be allocated properly on the stack with the existing macro ALLOC_CACHE_ALIGN_BUFFER().
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Applied to u-boot/master, thanks!
--
Tom