
11 Aug
2011
11 Aug
'11
11:22 a.m.
On 08/10/2011 10:33 PM, Eric Jarrige wrote:
Improve PLL freq computation by using the full resolution of the PLL registers
Hi Eric,
- return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1));
+}
- return (2*(CONFIG_SYSPLL_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1);
Please run checkpatch on your patches for V2. I have not yet done, but this line will report missing spaces.
Best regards, Stefano Babic
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