[PATCH v1 3/4] riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHE_LINE_SIZE

Some devices need SYS_CACHE_LINE_SIZE macro. Add StarFive SYS_CACHE_SHIFT_6 to enable it.

Signed-off-by: Minda Chen minda.chen@starfivetech.com --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 867cbcbe74..15da2a8559 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -26,6 +26,7 @@ config TARGET_SIFIVE_UNMATCHED

config TARGET_STARFIVE_VISIONFIVE2 bool "Support StarFive VisionFive2 Board" + select SYS_CACHE_SHIFT_6

config TARGET_TH1520_LPI4A bool "Support Sipeed's TH1520 Lichee PI 4A Board"