On Wednesday 21 July 2010 19:06:10 Stefan Roese wrote:
This patch adds the "ecctest" command to test and simulate ECC errors (single bit and/or double bit) while running from SDRAM. Currently only the IBM DDR2 controller is supported (405EX, 440SP(e), 460EX/GT).
This is done by copying and calling functions, modifying the SDRAM controller operation mode, in internal SRAM/OCM.
For correctable ECC errors (single bit) only the status will be printed since the DDR2 controller doesn't provide the faulting address:
=> ecctest 1000000 1 Using address 01000000 for 1 bit ECC error injection ECC: Correctable error
Uncorrectable ECC errors (double bit) will also display the faulting address:
=> ecctest 1000000 2 Using address 01000000 for 2 bit ECC error injection ECC: Uncorrectable error at 0x0001000000
To enable this "ecctest" function you need to define CONFIG_CMD_ECCTEST in the board config header.
Tested on katmai and t3corp.
Applied to u-boot-ppc4xx/master. Thanks.
Cheers, Stefan
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