Re: [U-Boot] [PATCH v6 6/8] armv8: ls1046a: add icid setup for qman portals

1 Aug 2018

...
-----Original Message-----
From: laurentiu.tudor@nxp.com [mailto:laurentiu.tudor@nxp.com]
Sent: Tuesday, July 31, 2018 8:22 PM
To: u-boot@lists.denx.de; Prabhakar Kushwaha
prabhakar.kushwaha@nxp.com; York Sun york.sun@nxp.com
Cc: Bharat Bhushan bharat.bhushan@nxp.com; Horia Geanta
horia.geanta@nxp.com; Laurentiu Tudor laurentiu.tudor@nxp.com
Subject: [PATCH v6 6/8] armv8: ls1046a: add icid setup for qman portals
From: Laurentiu Tudor laurentiu.tudor@nxp.com
Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.
Signed-off-by: Laurentiu Tudor laurentiu.tudor@nxp.com
Reviewed-by: Bharat Bhushan bharat.bhushan@nxp.com
Thanks
-Bharat
...

.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 16 +++++++
 .../asm/arch-fsl-layerscape/fsl_portals.h     | 24 +++++++++++
 drivers/misc/fsl_portals.c                    | 43 +++++++++++++++----
 3 files changed, 75 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 1c528ab751..80e1ceadc0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -6,6 +6,22 @@
 #include <common.h>
 #include <asm/arch-fsl-layerscape/immap_lsch2.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/arch-fsl-layerscape/fsl_portals.h>



+#ifdef CONFIG_SYS_DPAA_QBMAN
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {

SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),

+};
+#endif
struct icid_id_table icid_tbl[] = {
 #ifdef CONFIG_SYS_DPAA_QBMAN
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
new file mode 100644
index 0000000000..1577e935a6
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*


Copyright 2018 NXP


*/


+#ifndef _FSL_PORTALS_H_
+#define _FSL_PORTALS_H_



+struct qportal_info {

u16	dicid;	/* DQRR ICID */
u16	ficid;	/* frame data ICID */
u16	icid;
u8	sdest;

+};



+#define SET_QP_INFO(streamid, dest) \

{ .dicid = (streamid), .ficid = (streamid), .icid = (streamid), \
.sdest = (dest) }


+extern struct qportal_info qp_info[];
+void fdt_portal(void *blob, const char *compat, const char *container,

u64 addr, u32 size);




+#endif
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 22faf16751..a524510707 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -13,6 +13,9 @@
 #ifdef CONFIG_PPC
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
+#else
+#include <asm/arch-fsl-layerscape/fsl_portals.h>
+#include <asm/arch-fsl-layerscape/fsl_icid.h>
 #endif
 #include <fsl_qbman.h>
@@ -45,6 +48,22 @@ void setup_qbman_portals(void)
   	/* set frame liodn */
   	out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) |
fliodn);
   }
+#else
+#ifdef CONFIG_ARM

int i;

for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
u8 sdest = qp_info[i].sdest;


u16 ficid = qp_info[i].ficid;


u16 dicid = qp_info[i].dicid;


u16 icid = qp_info[i].icid;



out_be32(&qman->qcsp[i].qcsp_lio_cfg, (icid << 16) |


			dicid);


/* set frame icid */


out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | ficid);


}

+#endif
 #endif
/* Change default state of BMan ISDR portals to all 1s */
@@ -178,6 +197,10 @@ void fdt_fixup_qportals(void *blob)
   char compat[64];
   int compat_len;
+#ifndef CONFIG_PPC

int smmu_ph = fdt_get_smmu_phandle(blob);

+#endif

maj = (rev_1 >> 8) & 0xff;
 min = rev_1 & 0xff;
 ip_cfg = rev_2 & 0xff;

@@ -188,7 +211,6 @@ void fdt_fixup_qportals(void *blob)
off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
   while (off != -FDT_ERR_NOTFOUND) {
-#ifdef CONFIG_PPC
 #ifdef CONFIG_FSL_CORENET
   	u32 liodns[2];
 #endif
@@ -198,12 +220,7 @@ void fdt_fixup_qportals(void *blob)
   	if (!ci)
   		goto err;

i = *ci;



-#ifdef CONFIG_SYS_DPAA_FMAN

int j;



-#endif



-#endif /* CONFIG_PPC */

i = fdt32_to_cpu(*ci);

err = fdt_setprop(blob, off, "compatible", compat,

compat_len);
   	if (err < 0)
   		goto err;
@@ -235,7 +252,7 @@ void fdt_fixup_qportals(void *blob)
 #endif
#ifdef CONFIG_SYS_DPAA_FMAN

for (j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {




for (int j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
char name[] = "fman@0";

name[sizeof(name) - 2] = '0' + j;



@@ -251,6 +268,16 @@ void fdt_fixup_qportals(void *blob)
   	if (err < 0)
   		goto err;
 #endif
+#else

if (smmu_ph >= 0) {


	u32 icids[3];



	icids[0] = qp_info[i].icid;


	icids[1] = qp_info[i].dicid;


	icids[2] = qp_info[i].ficid;



	fdt_set_iommu_prop(blob, off, smmu_ph, icids, 3);


}



#endif /* CONFIG_PPC */
err:
2.17.1

    