From: Fabio Estevam festevam@gmail.com
There are two versions of imx6ul pico SOMs: one with 256MB and another one with 512MB of RAM.
Convert to SPL so that both versions can be supported. This patch doesn't rework the clock initialization to avoid changing the behavior in this same patch, so it will be cleaned up in future.
Currently only the 256MB is tested/supported.
Signed-off-by: Fabio Estevam festevam@gmail.com Signed-off-by: Fabio Berton fabio.berton@ossystems.com.br Signed-off-by: Otavio Salvador otavio@ossystems.com.br ---
Changes in v2: - add newline after SPDX header - avoid initializing CCGR7 as UL does not have it - mention clocks initialization will be cleaned up in future
arch/arm/mach-imx/mx6/Kconfig | 1 + board/technexion/pico-imx6ul/Makefile | 2 +- board/technexion/pico-imx6ul/spl.c | 115 ++++++++++++++++++++++++++ configs/pico-imx6ul_defconfig | 14 +++- include/configs/pico-imx6ul.h | 1 + 5 files changed, 131 insertions(+), 2 deletions(-) create mode 100644 board/technexion/pico-imx6ul/spl.c
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index a2799c436e..06c25bae36 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -402,6 +402,7 @@ config TARGET_OT1200 config TARGET_PICO_IMX6UL bool "PICO-IMX6UL-EMMC" select MX6UL + select SUPPORT_SPL
config TARGET_LITEBOARD bool "Grinn liteBoard (i.MX6UL)" diff --git a/board/technexion/pico-imx6ul/Makefile b/board/technexion/pico-imx6ul/Makefile index 8fdb7875ac..b7493df01c 100644 --- a/board/technexion/pico-imx6ul/Makefile +++ b/board/technexion/pico-imx6ul/Makefile @@ -2,4 +2,4 @@ # (C) Copyright 2015 Technexion Ltd. # (C) Copyright 2015 Freescale Semiconductor, Inc.
-obj-y := pico-imx6ul.o +obj-y := pico-imx6ul.o spl.o diff --git a/board/technexion/pico-imx6ul/spl.c b/board/technexion/pico-imx6ul/spl.c new file mode 100644 index 0000000000..78c731fe7c --- /dev/null +++ b/board/technexion/pico-imx6ul/spl.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <asm/arch/clock.h> +#include <asm/arch/iomux.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6ul_pins.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/boot_mode.h> +#include <linux/libfdt.h> +#include <spl.h> + +#if defined(CONFIG_SPL_BUILD) +#include <asm/arch/mx6-ddr.h> + +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds = 0x00000030, + .grp_ddrmode_ctl = 0x00020000, + .grp_b0ds = 0x00000030, + .grp_ctlds = 0x00000030, + .grp_b1ds = 0x00000030, + .grp_ddrpke = 0x00000000, + .grp_ddrmode = 0x00020000, + .grp_ddr_type = 0x00080000, +}; + +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 = 0x00000030, + .dram_dqm1 = 0x00000030, + .dram_ras = 0x00000030, + .dram_cas = 0x00000030, + .dram_odt0 = 0x00000030, + .dram_odt1 = 0x00000030, + .dram_sdba2 = 0x00000000, + .dram_sdclk_0 = 0x00000030, + .dram_sdqs0 = 0x00000030, + .dram_sdqs1 = 0x00000030, + .dram_reset = 0x00000030, +}; + +static struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 = 0x00000000, + .p0_mpdgctrl0 = 0x01380134, + .p0_mprddlctl = 0x40404244, + .p0_mpwrdlctl = 0x40405050, +}; + +static struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize = 0, + .cs1_mirror = 0, + .cs_density = 32, + .ncs = 1, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 0, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, + .refsel = 1, + .refr = 3, +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed = 1333, + .density = 2, + .width = 16, + .banks = 8, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1350, + .trcmin = 4950, + .trasmin = 3600, +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0xFFFFFFFF, &ccm->CCGR0); + writel(0xFFFFFFFF, &ccm->CCGR1); + writel(0xFFFFFFFF, &ccm->CCGR2); + writel(0xFFFFFFFF, &ccm->CCGR3); + writel(0xFFFFFFFF, &ccm->CCGR4); + writel(0xFFFFFFFF, &ccm->CCGR5); + writel(0xFFFFFFFF, &ccm->CCGR6); +} + +static void spl_dram_init(void) +{ + mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); + mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); +} + +void board_init_f(ulong dummy) +{ + ccgr_init(); + arch_cpu_init(); + board_early_init_f(); + timer_init(); + preloader_console_init(); + spl_dram_init(); + memset(__bss_start, 0, __bss_end - __bss_start); + board_init_r(NULL, 0); +} + +void reset_cpu(ulong addr) +{ +} +#endif diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 3f969a2d6e..589e67be96 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -1,12 +1,23 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_PICO_IMX6UL=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_NR_DRAM_BANKS=1 CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx6ul/imximage.cfg" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET_SUPPORT=y +CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb" @@ -21,6 +32,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 1a148bf1a6..14d5cc3ddb 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -12,6 +12,7 @@ #include <linux/sizes.h> #include "mx6_common.h" #include <asm/mach-imx/gpio.h> +#include "imx6_spl.h"
/* Network support */