Tested-by: Hongbo Zhang hongbo.zhang@nxp.com
On Sun, Jun 19, 2016 at 12:38 PM, Chen-Yu Tsai wens@csie.org wrote:
Now that we have a secure stack section that guarantees usable memory, allocate the PSCI stacks in that section.
Also add a diagram detailing how the stacks are placed in memory.
Reserved space for the target PC remains unchanged. This should be moved to global variables within a secure data section in the future.
Signed-off-by: Chen-Yu Tsai wens@csie.org
arch/arm/cpu/armv7/psci.S | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S index 46fcf770c214..bfc4475e360c 100644 --- a/arch/arm/cpu/armv7/psci.S +++ b/arch/arm/cpu/armv7/psci.S @@ -196,18 +196,28 @@ ENTRY(psci_cpu_off_common) bx lr ENDPROC(psci_cpu_off_common)
-@ expects CPU ID in r0 and returns stack top in r0 +@ The stacks are allocated in reverse order, i.e. +@ the stack for CPU0 has the highest memory address. +@ +@ -------------------- __secure_stack_end +@ | CPU0 target PC | +@ |------------------| +@ | | +@ | CPU0 stack | +@ | | +@ |------------------| __secure_stack_end - 1KB +@ | . | +@ | . | +@ | . | +@ | . | +@ -------------------- __secure_stack_start +@ +@ This expects CPU ID in r0 and returns stack top in r0 ENTRY(psci_get_cpu_stack_top)
mov r3, #0x400 @ 1kB of stack per CPUmul r0, r0, r3ldr r3, =psci_text_end @ end of monitor textadd r3, r3, #0x2000 @ Skip two pageslsr r3, r3, #12 @ Align to start of pagelsl r3, r3, #12sub r3, r3, #4 @ reserve 1 word for target PCsub r0, r3, r0 @ here's our stack!
@ stack top = __secure_stack_end - (cpuid << ARM_PSCI_STACK_SHIFT)ldr r3, =__secure_stack_endsub r0, r3, r0, LSL #ARM_PSCI_STACK_SHIFTsub r0, r0, #4 @ Save space for target PC bx lrENDPROC(psci_get_cpu_stack_top)
-- 2.8.1