
14 Aug
2010
14 Aug
'10
11:49 p.m.
Dear Reinhard Meyer,
In message 4C6700E5.2070009@emk-elektronik.de you wrote:
Would the toolchain "gulp" when one defines the whole 4 GB that way?
In fact, a rather novel approach (just theorizing here):
#define SRAM_BASE offsetof(soc.sram) #define SRAM_SIZE sizeof(soc.sram)
dbu_t *dbu = (dbu_t *)offsetof(soc.dbu);
without ever assigning soc the address 0...
Urgh... that's a log of pretty heavy assumptions, and not exactly readable / understandable code either. I gues your're not targeting the next IOCCC?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Die Scheu vor Verantwortung ist die Krankheit unserer Zeit.
-- Otto von Bismarck