This binding differs from that of Linux. Update it and change existing users.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/dts/stv0991.dts | 2 +- doc/device-tree-bindings/serial/pl011.txt | 53 +++++++++++++++++++++++++++++++ doc/device-tree-bindings/serial/pl01x.txt | 7 ---- drivers/serial/serial_pl01x.c | 6 ++-- 4 files changed, 58 insertions(+), 10 deletions(-) create mode 100644 doc/device-tree-bindings/serial/pl011.txt delete mode 100644 doc/device-tree-bindings/serial/pl01x.txt
diff --git a/arch/arm/dts/stv0991.dts b/arch/arm/dts/stv0991.dts index b25c48b..fd425b4 100644 --- a/arch/arm/dts/stv0991.dts +++ b/arch/arm/dts/stv0991.dts @@ -18,6 +18,6 @@ uart0: serial@0x80406000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x80406000 0x1000>; - clock = <2700000>; + clock-frequency = <2700000>; }; }; diff --git a/doc/device-tree-bindings/serial/pl011.txt b/doc/device-tree-bindings/serial/pl011.txt new file mode 100644 index 0000000..af66272 --- /dev/null +++ b/doc/device-tree-bindings/serial/pl011.txt @@ -0,0 +1,53 @@ +* ARM AMBA Primecell PL011 serial UART + +Required properties: +- compatible: must be "arm,primecell", "arm,pl011" +- reg: exactly one register range with length 0x1000 +- interrupts: exactly one interrupt specifier + +Optional properties: +- pinctrl: + When present, must have one state named "default", + and may contain a second name named "sleep". The former + state sets up pins for ordinary operation whereas + the latter state will put the associated pins to sleep + when the UART is unused +- clocks: + When present, the first clock listed must correspond to + the clock named UARTCLK on the IP block, i.e. the clock + to the external serial line, whereas the second clock + must correspond to the PCLK clocking the internal logic + of the block. Just listing one clock (the first one) is + deprecated. +- clocks-names: + When present, the first clock listed must be named + "uartclk" and the second clock listed must be named + "apb_pclk" +- dmas: + When present, may have one or two dma channels. + The first one must be named "rx", the second one + must be named "tx". +- auto-poll: + Enables polling when using RX DMA. +- poll-rate-ms: + Rate at which poll occurs when auto-poll is set, + default 100ms. +- poll-timeout-ms: + Poll timeout when auto-poll is set, default + 3000ms. +- clock-frequency: + Input clock frequency for UART. + +See also bindings/arm/primecell.txt + +Example: + +uart@80120000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x80120000 0x1000>; + interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma 13 0 0x2>, <&dma 13 0 0x0>; + dma-names = "rx", "tx"; + clocks = <&foo_clk>, <&bar_clk>; + clock-names = "uartclk", "apb_pclk"; +}; diff --git a/doc/device-tree-bindings/serial/pl01x.txt b/doc/device-tree-bindings/serial/pl01x.txt deleted file mode 100644 index 61c27d1..0000000 --- a/doc/device-tree-bindings/serial/pl01x.txt +++ /dev/null @@ -1,7 +0,0 @@ -* ARM AMBA Primecell PL011 & PL010 serial UART - -Required properties: -- compatible: must be "arm,primecell", "arm,pl011" or "arm,pl010" -- reg: exactly one register range with length 0x1000 -- clock: input clock frequency for the UART (used to calculate the baud - rate divisor) diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index ad503af..ae6fc0e 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -365,13 +365,15 @@ static int pl01x_serial_ofdata_to_platdata(struct udevice *dev) struct pl01x_serial_platdata *plat = dev_get_platdata(dev); fdt_addr_t addr;
- addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); + addr = dev_get_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL;
plat->base = addr; - plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "clock", 1); + plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "clock-frequency", 1); plat->type = dev_get_driver_data(dev); + return 0; } #endif