Re: [U-Boot] [PATCH 1/4] spi: cadence_qspi_apb: Support 32 bit AHB address

13 Apr 2016


      On 04/13/2016 12:52 PM, Vignesh R wrote:
...
AHB address can be as long as 32 bit, hence remove the
CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT
and read as u32 value, it anyway does not make sense to mask upper bits.
Signed-off-by: Vignesh R vigneshr@ti.com
drivers/spi/cadence_qspi_apb.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)
Oops, I didn't realize this was for U-Boot.
On SoCFPGA SoCkit:
Tested-by: Marek Vasut marex@denx.de
Acked-by: Marek Vasut marex@denx.de
Best regards,
Marek Vasut