On Thu, 17 Aug 2017, Paweł Jarosz wrote:
Rockchip bootrom first reads 1KB data from nand at offset 0x10080C00 and executes it. Then waits for back to bootrom and loads another 32KB to sram which also executes. Sdram initialisation code needs to be in one of these two steps. Then bootloader loads another ~200KB of data at offset 0x60000000 and jumps to it.
32KB of data is a little low for tpl + spl part and ~200KB data is to low for u-boot part(for example to boot from mmc you need to disable usb support.
My solution to size problem is to move sdram initialisation code to tpl stage, move spl part to third stage(reading 200KB data) and add support for loading u-boot by spl from ext2/4, fat partitions.
But moving sdram initialisation code to tpl increases size of tpl above 1KB (first boot stage). Solution to this is to add code which will be below 1KB offset in tpl binary and do back to bootrom at very beginning of the tpl execution.
Adding this few lines of code here meets these conditions.
Signed-off-by: Paweł Jarosz paweljarosz3691@gmail.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
See below on why this entire series has a dependency on getting boot0 usage fixed for some unrelated architectures (I had hoped we'd already done this by now).
Changes since v1:
- moved to vector.S
Changes since v2:
- none
Changes since v3:
- none
arch/arm/include/asm/arch-rockchip/boot0.h | 14 ++++++++++++++ arch/arm/lib/vectors.S | 18 +++++++++--------- configs/mk808_defconfig | 1 + 3 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h index 72d264b..4179448 100644 --- a/arch/arm/include/asm/arch-rockchip/boot0.h +++ b/arch/arm/include/asm/arch-rockchip/boot0.h @@ -5,6 +5,19 @@
- SPDX-License-Identifier: GPL-2.0+
*/
+#if defined(CONFIG_ROCKCHIP_RK3066) && defined(CONFIG_TPL_BUILD)
- ldr r3, =0x10080900
- ldr r0, [r3]
- cmp r0, #1
- movne r0, #1
- strne r0, [r3]
- beq out_of_bootrom
- bx lr
+out_of_bootrom:
- mov r0, #0
- str r0, [r3]
+#endif
/*
- Execution starts on the instruction following this 4-byte header
- (containing the magic 'RK33').
@@ -26,6 +39,7 @@ */ b reset /* may be overwritten --- should be 'nop' or a 'b reset' */ #endif
- b reset
#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD) diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index 1019091..e3c18da 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -47,6 +47,15 @@
_start:
+#ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK +/*
- Various SoCs need something special and SoC-specific up front in
- order to boot, allow them to set that in their boot0.h file and then
- use it here.
- */
+#include <asm/arch/boot0.h> +#endif
I agree on this one, but won't be able to merge it until we've resolved the abuse of boot0 by some of the other architectures. For details, see the discussion following Kever's series to adjust this.
I have this on my plate for the next release cycle.
#ifdef CONFIG_SYS_DV_NOR_BOOT_CFG .word CONFIG_SYS_DV_NOR_BOOT_CFG #endif @@ -60,15 +69,6 @@ _start: ldr pc, _irq ldr pc, _fiq
-#ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK -/*
- Various SoCs need something special and SoC-specific up front in
- order to boot, allow them to set that in their boot0.h file and then
- use it here.
- */
-#include <asm/arch/boot0.h> -#endif
/*
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index ab67e4f..bf4af82 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -13,6 +13,7 @@ CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y CONFIG_SYS_NS16550=y +CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y CONFIG_BOOTDELAY=1 CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO=y