On Tue, 2008-01-08 at 01:24, Kumar Gala wrote:
Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR.
Also, minor cleanup in cache.h to make the code a bit more readable.
Signed-off-by: Kumar Gala galak@kernel.crashing.org
Again, this is my kernel.org u-boot tree in the mpc85xx branch and supercedes the previous patch that was fixup in the cache warnings.
cpu/mpc85xx/start.S | 9 +++++++-- include/asm-ppc/cache.h | 10 ++++------ include/asm-ppc/processor.h | 4 ++++ include/configs/MPC8540ADS.h | 7 ------- include/configs/MPC8540EVAL.h | 7 ------- include/configs/MPC8541CDS.h | 7 ------- include/configs/MPC8544DS.h | 7 ------- include/configs/MPC8548CDS.h | 7 ------- include/configs/MPC8555CDS.h | 7 ------- include/configs/MPC8560ADS.h | 7 ------- include/configs/MPC8568MDS.h | 7 ------- include/configs/MPC8641HPCN.h | 7 ------- include/configs/PM854.h | 7 ------- include/configs/PM856.h | 7 ------- include/configs/SBC8540.h | 7 ------- include/configs/TQM85xx.h | 7 ------- include/configs/sbc8560.h | 7 ------- include/configs/stxgp3.h | 7 ------- include/configs/stxssa.h | 7 ------- 19 files changed, 15 insertions(+), 120 deletions(-)
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index b769ef8..b489d2f 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -268,7 +268,10 @@ _start_e500: */ lis r3,CFG_INIT_RAM_ADDR@h ori r3,r3,CFG_INIT_RAM_ADDR@l
- li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
- mfspr r2, L1CFG0
- andi. r2, r2, 0x1ff
- /* cache size * 1024 / (2 * L1 line size) */
- slwi r2, r2, (10 - 1 - L1_CACHE_SHIFT) mtctr r2 li r0,0
1: @@ -1061,7 +1064,9 @@ unlock_ram_in_cache: /* invalidate the INIT_RAM section */ lis r3,(CFG_INIT_RAM_ADDR & ~31)@h ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
- li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
- mfspr r4,L1CFG0
- andi. r4,r4,0x1ff
- slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT) mtctr r4
1: icbi r0,r3 dcbi r0,r3
Kumar,
As per Stefan's question:
Those above changes weren't needed in the 86xx/start.S code, so you removed the cache bits from the MPC8641HPCN.h config file as well. Good.
I'm assuming that the generic/cache.h is now supplying the right defines for 8641, right?
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 6f87240..344f6b2 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -577,13 +577,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-/* Cache Configuration */ -#define CFG_DCACHE_SIZE 32768 -#define CFG_CACHELINE_SIZE 32 -#if defined(CONFIG_CMD_KGDB)
- #define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
-#endif
/*
- Internal Definitions
You didn't apply the same removal to the MPC8610HPCD.h config file, though. Was that just oversight, or was there an issue with the generic values from cache.h now? If it is the former, I'll just knock out the obvious removal of that cache #defineage from the MPC8610HPCD.h file as well.
Thanks, jdl