On 11/15/2016 01:28 AM, Shengzhou Liu wrote:
- add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.
Signed-off-by: Shengzhou Liu Shengzhou.Liu@nxp.com
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 7 +- arch/powerpc/cpu/mpc85xx/cpu_init.c | 8 +- arch/powerpc/include/asm/config_mpc85xx.h | 2 - board/freescale/ls1021aqds/ls1021aqds.c | 6 +- drivers/ddr/fsl/ctrl_regs.c | 134 +++++++++++++++++++++++++++++- drivers/ddr/fsl/fsl_ddr_gen4.c | 23 ----- drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 3 - include/fsl_ddr.h | 2 + include/fsl_ddr_sdram.h | 3 +- 9 files changed, 153 insertions(+), 35 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index b7a2e0c..19de15e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -25,6 +25,9 @@ #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT #include <asm/armv8/sec_firmware.h> #endif +#ifdef CONFIG_SYS_FSL_DDR +#include <fsl_ddr.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -400,7 +403,9 @@ int arch_early_init_r(void) #ifdef CONFIG_SYS_FSL_ERRATUM_A009635 erratum_a009635(); #endif
+#if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
- erratum_a009942_check_cpo();
+#endif #ifdef CONFIG_MP #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI) /* Check the psci version to determine if the psci is supported */ diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 53b3729..0e8be1d 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -45,7 +45,9 @@ #include <nand.h> #include <errno.h> #endif
+#ifndef CONFIG_QEMU_E500 +#include <fsl_ddr.h> +#endif #include "../../../../drivers/block/fsl_sata.h" #ifdef CONFIG_U_QE #include <fsl_qe.h> @@ -947,6 +949,10 @@ int cpu_init_r(void)
#endif /* CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE */
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
- erratum_a009942_check_cpo();
+#endif
#ifdef CONFIG_FMAN_ENET fman_enet_init(); #endif diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 6d845e8..1e62a9c 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -681,7 +681,6 @@ #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_A004468 -#define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 @@ -720,7 +719,6 @@ #define CONFIG_SYS_FSL_TBCLK_DIV 16 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB1_PHY_ENABLE -#define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 4eb38a7..79078d2 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -22,7 +22,7 @@ #include <spl.h> #include <fsl_devdis.h> #include <fsl_validate.h>
+#include <fsl_ddr.h> #include "../common/sleep.h" #include "../common/qixis.h" #include "ls1021aqds_qixis.h" @@ -433,7 +433,9 @@ int board_init(void) #ifdef CONFIG_SYS_FSL_ERRATUM_A010315 erratum_a010315(); #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
- erratum_a009942_check_cpo();
+#endif major = get_soc_major_rev(); if (major == SOC_MAJOR_VER_1_0) { /* Set CCI-400 control override register to diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 24fd366..360f687 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -5,14 +5,14 @@ */
/*
- Generic driver for Freescale DDR/DDR2/DDR3 memory controller.
*/
- Generic driver for Freescale DDR/DDR2/DDR3/DDR4 memory controller.
- Based on code from spd_sdram.c
- Author: James Yang [at freescale.com]
#include <common.h> #include <fsl_ddr_sdram.h>
+#include <fsl_errata.h> #include <fsl_ddr.h> #include <fsl_immap.h> #include <asm/io.h> @@ -2306,6 +2306,37 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num, unsigned int ip_rev = 0; unsigned int unq_mrs_en = 0; int cs_en = 1; +#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
- unsigned int ddr_freq;
+#endif +#if defined(CONFIG_SYS_FSL_ERRATUM_A009942) || \
- defined(CONFIG_SYS_FSL_ERRATUM_A008378)
- struct ccsr_ddr __iomem *ddrc;
- switch (ctrl_num) {
- case 0:
ddrc = (void *)CONFIG_SYS_FSL_DDR_ADDR;break;+#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1)
- case 1:
ddrc = (void *)CONFIG_SYS_FSL_DDR2_ADDR;break;+#endif +#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2)
- case 2:
ddrc = (void *)CONFIG_SYS_FSL_DDR3_ADDR;break;+#endif +#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3)
- case 3:
ddrc = (void *)CONFIG_SYS_FSL_DDR4_ADDR;break;+#endif
- default:
printf("%s unexpected ctrl_num = %u\n", __func__, ctrl_num);return 1;- }
+#endif
Got a warning T1024RDB_SPIFLASH,T1042RDB_PI_SPIFLASH,T1024QDS_SPIFLASH,T1024QDS_NAND,T1024RDB_NAND,T1040QDS_SECURE_BOOT,T1042RDB_SECURE_BOOT,T1024QDS,T1040RDB,T1042RDB_PI_NAND,T1042RDB_PI_SDCARD,T1042RDB,T1040RDB_SDCARD,T1040QDS,T1024QDS_SECURE_BOOT,T1040RDB_SPIFLASH,T1024RDB,T1024RDB_SECURE_BOOT,T1024QDS_SDCARD,T1042RDB_PI_NAND_SECURE_BOOT,T1040RDB_SECURE_BOOT,T1040RDB_NAND,T1024RDB_SDCARD,T1042RDB_PI) ../drivers/ddr/fsl/ctrl_regs.c:2314:19: warning: variable 'ddrc' set but not used [-Wunused-but-set-variable]
This warning is gone after your next patch. I guess you have some SoCs with A-008378 but not DDR4. Please rearrange the change in each patch.
York