On May 21, 2009, at 12:10 PM, Peter Tyser wrote:
DMA support is now enabled via the CONFIG_FSL_DMA define instead of the previous CONFIG_DDR_ECC
Signed-off-by: Peter Tyser ptyser@xes-inc.com
cpu/mpc85xx/cpu.c | 47 ------------------------ cpu/mpc86xx/cpu.c | 55 ---------------------------- drivers/dma/Makefile | 1 + drivers/dma/fsl_dma.c | 92 ++++++++++++++++++++++++++++++++++++++ +++++++++ include/configs/PM854.h | 1 + include/configs/PM856.h | 1 + 6 files changed, 95 insertions(+), 102 deletions(-) create mode 100644 drivers/dma/fsl_dma.c
We should add something to include/asm-ppc/config.h to ensure CONFIG_FSL_DMA is set if CONFIG_DDR_ECC is.
#if defined(CONFIG_DDR_ECC) && (defined(CONFIG_MPC86xx) || defined(CONFIG_MPC85xx)) #define CONFIG_FSL_DMA #endif
- k
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 86b19a6..416ea08 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -258,53 +258,6 @@ reset_85xx_watchdog(void) } #endif /* CONFIG_WATCHDOG */
-#if defined(CONFIG_DDR_ECC) -void dma_init(void) {
- volatile ccsr_dma_t *dma_base = (void *)
(CONFIG_SYS_MPC85xx_DMA_ADDR);
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->satr = 0x00040000;
- dma->datr = 0x00040000;
- dma->sr = 0xffffffff; /* clear any errors */
- asm("sync; isync; msync");
- return;
-}
-uint dma_check(void) {
- volatile ccsr_dma_t *dma_base = (void *)
(CONFIG_SYS_MPC85xx_DMA_ADDR);
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- volatile uint status = dma->sr;
- /* While the channel is busy, spin */
- while((status & 4) == 4) {
status = dma->sr;- }
- /* clear MR[CS] channel start bit */
- dma->mr &= 0x00000001;
- asm("sync;isync;msync");
- if (status != 0) {
printf ("DMA Error: status = %x\n", status);- }
- return status;
-}
-int dma_xfer(void *dest, uint count, void *src) {
- volatile ccsr_dma_t *dma_base = (void *)
(CONFIG_SYS_MPC85xx_DMA_ADDR);
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->dar = (uint) dest;
- dma->sar = (uint) src;
- dma->bcr = count;
- dma->mr = 0xf000004;
- asm("sync;isync;msync");
- dma->mr = 0xf000005;
- asm("sync;isync;msync");
- return dma_check();
-} -#endif
/*
- Configures a UPM. The function requires the respective MxMR to be
set
- before calling this function. "size" is the number or entries,
not a sizeof. diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index d47cc5e..1f26ba1 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -177,61 +177,6 @@ watchdog_reset(void) } #endif /* CONFIG_WATCHDOG */
-#if defined(CONFIG_DDR_ECC) -void -dma_init(void) -{
- volatile ccsr_dma_t *dma_base = (void *)
(CONFIG_SYS_MPC86xx_DMA_ADDR);
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->satr = 0x00040000;
- dma->datr = 0x00040000;
- dma->sr = 0xffffffff; /* clear any errors */
- asm("sync; isync");
-}
-uint -dma_check(void) -{
- volatile ccsr_dma_t *dma_base = (void *)
(CONFIG_SYS_MPC86xx_DMA_ADDR);
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- volatile uint status = dma->sr;
- /* While the channel is busy, spin */
- while ((status & 4) == 4) {
status = dma->sr;- }
- /* clear MR[CS] channel start bit */
- dma->mr &= 0x00000001;
- asm("sync;isync");
- if (status != 0) {
printf("DMA Error: status = %x\n", status);- }
- return status;
-}
-int -dma_xfer(void *dest, uint count, void *src) -{
- volatile ccsr_dma_t *dma_base = (void *)
(CONFIG_SYS_MPC86xx_DMA_ADDR);
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->dar = (uint) dest;
- dma->sar = (uint) src;
- dma->bcr = count;
- dma->mr = 0xf000004;
- asm("sync;isync");
- dma->mr = 0xf000005;
- asm("sync;isync");
- return dma_check();
-}
-#endif /* CONFIG_DDR_ECC */
/*
- Print out the state of various machine registers.
- Currently prints out LAWs, BR0/OR0, and BATs
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index cf29efa..36d99f9 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libdma.a
COBJS-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o +COBJS-$(CONFIG_FSL_DMA) += fsl_dma.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c new file mode 100644 index 0000000..a9989ee --- /dev/null +++ b/drivers/dma/fsl_dma.c @@ -0,0 +1,92 @@ +/*
- Copyright 2004,2007,2008 Freescale Semiconductor, Inc.
- (C) Copyright 2002, 2003 Motorola Inc.
- Xianghua Xiao (X.Xiao@motorola.com)
- (C) Copyright 2000
- Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <config.h> +#include <common.h> +#include <asm/fsl_dma.h>
+#if defined(CONFIG_MPC85xx) +volatile ccsr_dma_t *dma_base = (void *) (CONFIG_SYS_MPC85xx_DMA_ADDR); +#elif defined(CONFIG_MPC86xx) +volatile ccsr_dma_t *dma_base = (void *) (CONFIG_SYS_MPC86xx_DMA_ADDR); +#else +#error "Freescale DMA engine not supported on your processor" +#endif
+static void dma_sync(void) +{ +#if defined(CONFIG_MPC85xx)
- asm("sync; isync; msync");
+#elif defined(CONFIG_MPC86xx)
- asm("sync; isync");
+#endif +}
+static uint dma_check(void) {
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- volatile uint status = dma->sr;
- /* While the channel is busy, spin */
- while (status & 4)
status = dma->sr;- /* clear MR[CS] channel start bit */
- dma->mr &= 1;
- dma_sync();
- if (status != 0)
printf ("DMA Error: status = %x\n", status);- return status;
+}
+void dma_init(void) {
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->satr = 0x00040000;
- dma->datr = 0x00040000;
- dma->sr = 0xffffffff; /* clear any errors */
- dma_sync();
+}
+int dma_xfer(void *dest, uint count, void *src) {
- volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->dar = (uint) dest;
- dma->sar = (uint) src;
- dma->bcr = count;
- /* Disable bandwidth control, use direct transfer mode */
- dma->mr = 0xf000004;
- dma_sync();
- /* Start the transfer */
- dma->mr = 0xf000005;
- dma_sync();
- return dma_check();
+} diff --git a/include/configs/PM854.h b/include/configs/PM854.h index 3f943aa..4b9bcca 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -96,6 +96,7 @@ #undef CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ #define CONFIG_DDR_ECC /* only for ECC DDR module */ +#define CONFIG_FSL_DMA /* use DMA to init DDR ECC */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
diff --git a/include/configs/PM856.h b/include/configs/PM856.h index 43c2873..1db20bc 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -98,6 +98,7 @@ #undef CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ #define CONFIG_DDR_ECC /* only for ECC DDR module */ +#define CONFIG_FSL_DMA /* use DMA to init DDR ECC */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
-- 1.6.2.1
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