Re: [PATCH 01/14] arm: dts: k3-j7200: Update devicetree to sync with v6.3-rc6

3 May 2023

On 09:43-20230503, Udit Kumar wrote:
...
From: Nishanth Menon nm@ti.com
Sync with Kernel.org v6.3-rc6 tag.
we are few days away from rc1 tag. I'd rather we refresh.
...
Signed-off-by: Nishanth Menon nm@ti.com
arch/arm/dts/k3-j7200-common-proc-board.dts | 63 +++++++-----------
 arch/arm/dts/k3-j7200-main.dtsi             | 72 +++++++++++++++++++--
 arch/arm/dts/k3-j7200-mcu-wakeup.dtsi       | 59 +++++++++++++++--
 arch/arm/dts/k3-j7200-som-p0.dtsi           | 46 +------------
 arch/arm/dts/k3-j7200.dtsi                  | 10 ++-
 5 files changed, 154 insertions(+), 96 deletions(-)

diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts
index d14f3c18b6..0d39d6b8cc 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
@@ -12,6 +12,9 @@
 #include <dt-bindings/phy/phy.h>
/ {

compatible = "ti,j7200-evm", "ti,j7200";
model = "Texas Instruments J7200 EVM";
chosen {
  stdout-path = "serial2:115200n8";
  bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";

@@ -77,7 +80,7 @@
   };
 };
-&wkup_pmx0 {
+&wkup_pmx2 {
   mcu_cpsw_pins_default: mcu-cpsw-pins-default {
   	pinctrl-single,pins = <
   		J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
@@ -131,15 +134,17 @@
   	>;
   };

main_usbss0_pins_default: main-usbss0-pins-default {


vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
pinctrl-single,pins = <


	J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */




	J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */

...
;
};

+};

vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {

+&main_pmx1 {

main_usbss0_pins_default: main-usbss0-pins-default {
pinctrl-single,pins = <


	J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */




	J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */

...
;
};

};
@@ -149,51 +154,27 @@
   status = "reserved";
 };
+&mcu_uart0 {

status = "okay";
/* Default pinmux */

+};



&main_uart0 {

status = "okay";
/* Shared with ATF on this platform */
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;

};
+&main_uart1 {

status = "okay";
/* Default pinmux */

+};



&main_uart2 {
   /* MAIN UART 2 is used by R5F firmware */
   status = "reserved";
 };
-&main_uart3 {

/* UART not brought out */
status = "disabled";

-};



-&main_uart4 {

/* UART not brought out */
status = "disabled";

-};



-&main_uart5 {

/* UART not brought out */
status = "disabled";

-};



-&main_uart6 {

/* UART not brought out */
status = "disabled";

-};



-&main_uart7 {

/* UART not brought out */
status = "disabled";

-};



-&main_uart8 {

/* UART not brought out */
status = "disabled";

-};



-&main_uart9 {

/* UART not brought out */
status = "disabled";

-};



&main_gpio2 {
   status = "disabled";
 };
@@ -229,6 +210,7 @@
 };
&main_i2c0 {

status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;

@@ -256,6 +238,7 @@

The i2c1 of the CPB (as it is labeled) is not connected to j7200.

*/
 &main_i2c1 {

status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;

diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index e8a41d09b4..138381f43c 100644
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -32,7 +32,7 @@
   	#size-cells = <1>;
   	ranges = <0x00 0x00 0x00100000 0x1c000>;

serdes_ln_ctrl: serdes-ln-ctrl@4080 {




serdes_ln_ctrl: mux-controller@4080 {
compatible = "mmio-mux";
#mux-control-cells = <1>;
mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */



@@ -54,7 +54,10 @@
   	#interrupt-cells = <3>;
   	interrupt-controller;
   	reg = <0x00 0x01800000 0x00 0x10000>,	/* GICD */

      <0x00 0x01900000 0x00 0x100000>;	/* GICR */




      <0x00 0x01900000 0x00 0x100000>,	/* GICR */


      <0x00 0x6f000000 0x00 0x2000>,	/* GICC */


      <0x00 0x6f010000 0x00 0x1000>,	/* GICH */


      <0x00 0x6f020000 0x00 0x2000>;	/* GICV */


/* vcpumntirq: virtual CPU interface maintenance interrupt */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;


@@ -139,6 +142,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster1: mailbox@31f81000 {


@@ -148,6 +152,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster2: mailbox@31f82000 {


@@ -157,6 +162,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster3: mailbox@31f83000 {


@@ -166,6 +172,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster4: mailbox@31f84000 {


@@ -175,6 +182,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster5: mailbox@31f85000 {


@@ -184,6 +192,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster6: mailbox@31f86000 {


@@ -193,6 +202,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster7: mailbox@31f87000 {


@@ -202,6 +212,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster8: mailbox@31f88000 {


@@ -211,6 +222,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster9: mailbox@31f89000 {


@@ -220,6 +232,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster10: mailbox@31f8a000 {


@@ -229,6 +242,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
mailbox0_cluster11: mailbox@31f8b000 {


@@ -238,6 +252,7 @@
   		ti,mbox-num-users = <4>;
   		ti,mbox-num-fifos = <16>;
   		interrupt-parent = <&main_navss_intr>;

	status = "disabled";

};
main_ringacc: ringacc@3c000000 {


@@ -292,7 +307,16 @@
   main_pmx0: pinctrl@11c000 {
   	compatible = "pinctrl-single";
   	/* Proxy 0 addressing */

reg = <0x00 0x11c000 0x00 0x2b4>;




reg = <0x00 0x11c000 0x00 0x10c>;


#pinctrl-cells = <1>;


pinctrl-single,register-width = <32>;


pinctrl-single,function-mask = <0xffffffff>;


};

main_pmx1: pinctrl@11c11c {
compatible = "pinctrl-single";


/* Proxy 0 addressing */


reg = <0x00 0x11c11c 0x00 0xc>;

#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;

@@ -307,6 +331,7 @@
   	power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 146 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart1: serial@2810000 {


@@ -318,6 +343,7 @@
   	power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 278 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart2: serial@2820000 {


@@ -329,6 +355,7 @@
   	power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 279 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart3: serial@2830000 {


@@ -340,6 +367,7 @@
   	power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 280 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart4: serial@2840000 {


@@ -351,6 +379,7 @@
   	power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 281 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart5: serial@2850000 {


@@ -362,6 +391,7 @@
   	power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 282 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart6: serial@2860000 {


@@ -373,6 +403,7 @@
   	power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 283 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart7: serial@2870000 {


@@ -384,6 +415,7 @@
   	power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 284 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart8: serial@2880000 {


@@ -395,6 +427,7 @@
   	power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 285 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_uart9: serial@2890000 {


@@ -406,6 +439,7 @@
   	power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 286 2>;
   	clock-names = "fclk";

status = "disabled";

};
main_i2c0: i2c@2000000 {


@@ -417,6 +451,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 187 1>;
   	power-domains = <&k3_pds 187 TI_SCI_PD_SHARED>;

status = "disabled";

};
main_i2c1: i2c@2010000 {


@@ -428,6 +463,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 188 1>;
   	power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;

status = "disabled";

};
main_i2c2: i2c@2020000 {


@@ -439,6 +475,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 189 1>;
   	power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;

status = "disabled";

};
main_i2c3: i2c@2030000 {


@@ -450,6 +487,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 190 1>;
   	power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;

status = "disabled";

};
main_i2c4: i2c@2040000 {


@@ -461,6 +499,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 191 1>;
   	power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;

status = "disabled";

};
main_i2c5: i2c@2050000 {


@@ -472,6 +511,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 192 1>;
   	power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;

status = "disabled";

};
main_i2c6: i2c@2060000 {


@@ -483,6 +523,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 193 1>;
   	power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;

status = "disabled";

};
main_sdhci0: mmc@4f80000 {


@@ -606,10 +647,10 @@
   	clock-names = "fck";
   	#address-cells = <3>;
   	#size-cells = <2>;

bus-range = <0x0 0xf>;




bus-range = <0x0 0xff>;

cdns,no-bar-match-nbits = <64>;


vendor-id = /bits/ 16 <0x104c>;


device-id = /bits/ 16 <0xb00f>;




vendor-id = <0x104c>;


device-id = <0xb00f>;

msi-map = <0x0 &gic_its 0x0 0x10000>;
dma-coherent;
ranges = <0x01000000 0x0 0x18001000  0x00 0x18001000  0x0 0x0010000>,

@@ -633,6 +674,7 @@
   	clocks = <&k3_clks 240 6>;
   	clock-names = "fck";
   	max-functions = /bits/ 8 <6>;

max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;

dma-coherent;
};

@@ -735,6 +777,24 @@
   	clock-names = "gpio";
   };

watchdog0: watchdog@2200000 {
compatible = "ti,j7-rti-wdt";


reg = <0x0 0x2200000 0x0 0x100>;


clocks = <&k3_clks 252 1>;


power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;


assigned-clocks = <&k3_clks 252 1>;


assigned-clock-parents = <&k3_clks 252 5>;


};

watchdog1: watchdog@2210000 {
compatible = "ti,j7-rti-wdt";


reg = <0x0 0x2210000 0x0 0x100>;


clocks = <&k3_clks 253 1>;


power-domains = <&k3_pds 253 TI_SCI_PD_EXCLUSIVE>;


assigned-clocks = <&k3_clks 253 1>;


assigned-clock-parents = <&k3_clks 253 5>;


};
main_r5fss0: r5fss@5c00000 {
  compatible = "ti,j7200-r5fss";
  ti,cluster-mode = <1>;

diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 1044ec6c4b..de56a0165b 100644
--- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
@@ -12,8 +12,8 @@
mbox-names = "rx", "tx";



mboxes= <&secure_proxy_main 11>,


	<&secure_proxy_main 13>;




mboxes = <&secure_proxy_main 11>,


	 <&secure_proxy_main 13>;


reg-names = "debug_messages";
reg = <0x00 0x44083000 0x00 0x1000>;


@@ -56,7 +56,34 @@
   wkup_pmx0: pinctrl@4301c000 {
   	compatible = "pinctrl-single";
   	/* Proxy 0 addressing */

reg = <0x00 0x4301c000 0x00 0x178>;




reg = <0x00 0x4301c000 0x00 0x34>;


#pinctrl-cells = <1>;


pinctrl-single,register-width = <32>;


pinctrl-single,function-mask = <0xffffffff>;


};

wkup_pmx1: pinctrl@0x4301c038 {
compatible = "pinctrl-single";


/* Proxy 0 addressing */


reg = <0x00 0x4301c038 0x00 0x8>;


#pinctrl-cells = <1>;


pinctrl-single,register-width = <32>;


pinctrl-single,function-mask = <0xffffffff>;


};

wkup_pmx2: pinctrl@0x4301c068 {
compatible = "pinctrl-single";


/* Proxy 0 addressing */


reg = <0x00 0x4301c068 0x00 0xec>;


#pinctrl-cells = <1>;


pinctrl-single,register-width = <32>;


pinctrl-single,function-mask = <0xffffffff>;


};

wkup_pmx3: pinctrl@0x4301c174 {
compatible = "pinctrl-single";


/* Proxy 0 addressing */


reg = <0x00 0x4301c174 0x00 0x20>;

#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;

@@ -79,6 +106,7 @@
   	power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 287 2>;
   	clock-names = "fclk";

status = "disabled";

};
mcu_uart0: serial@40a00000 {


@@ -90,6 +118,7 @@
   	power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
   	clocks = <&k3_clks 149 2>;
   	clock-names = "fclk";

status = "disabled";

};
wkup_gpio_intr: interrupt-controller@42200000 {


@@ -249,6 +278,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 194 1>;
   	power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;

status = "disabled";

};
mcu_i2c1: i2c@40b10000 {


@@ -260,6 +290,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 195 1>;
   	power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;

status = "disabled";

};
wkup_i2c0: i2c@42120000 {


@@ -271,6 +302,7 @@
   	clock-names = "fck";
   	clocks = <&k3_clks 197 1>;
   	power-domains = <&k3_pds 197 TI_SCI_PD_SHARED>;

status = "disabled";

};
fss: syscon@47000000 {


@@ -325,7 +357,7 @@
   	clocks = <&k3_clks 0 1>;
   	assigned-clocks = <&k3_clks 0 3>;
   	assigned-clock-rates = <60000000>;

clock-names = "adc_tsc_fck";




clock-names = "fck";

dmas = <&main_udmap 0x7400>,
	<&main_udmap 0x7401>;
dma-names = "fifo0", "fifo1";

@@ -375,4 +407,23 @@
   		ti,loczrama = <1>;
   	};
   };


mcu_crypto: crypto@40900000 {
compatible = "ti,j721e-sa2ul";


reg = <0x00 0x40900000 0x00 0x1200>;


power-domains = <&k3_pds 265 TI_SCI_PD_SHARED>;


#address-cells = <2>;


#size-cells = <2>;


ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;


dmas = <&mcu_udmap 0xf501>, <&mcu_udmap 0x7502>,


       <&mcu_udmap 0x7503>;


dma-names = "tx", "rx1", "rx2";



rng: rng@40910000 {


	compatible = "inside-secure,safexcel-eip76";


	reg = <0x00 0x40910000 0x00 0x7d>;


	interrupts = <GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH>;


	status = "disabled"; /* Used by OP-TEE */


};


};

};
diff --git a/arch/arm/dts/k3-j7200-som-p0.dtsi b/arch/arm/dts/k3-j7200-som-p0.dtsi
index 3472444017..fa44ed4c17 100644
--- a/arch/arm/dts/k3-j7200-som-p0.dtsi
+++ b/arch/arm/dts/k3-j7200-som-p0.dtsi
@@ -144,6 +144,7 @@
 };
&mailbox0_cluster0 {

status = "okay";
interrupts = <436>;
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {


@@ -158,6 +159,7 @@
 };
&mailbox0_cluster1 {

status = "okay";
interrupts = <432>;
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {


@@ -171,46 +173,6 @@
   };
 };
-&mailbox0_cluster2 {

status = "disabled";

-};



-&mailbox0_cluster3 {

status = "disabled";

-};



-&mailbox0_cluster4 {

status = "disabled";

-};



-&mailbox0_cluster5 {

status = "disabled";

-};



-&mailbox0_cluster6 {

status = "disabled";

-};



-&mailbox0_cluster7 {

status = "disabled";

-};



-&mailbox0_cluster8 {

status = "disabled";

-};



-&mailbox0_cluster9 {

status = "disabled";

-};



-&mailbox0_cluster10 {

status = "disabled";

-};



-&mailbox0_cluster11 {

status = "disabled";

-};



&mcu_r5fss0_core0 {
   mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
   memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
@@ -256,7 +218,7 @@
   pinctrl-names = "default";
   pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;

flash@0{


flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;

@@ -267,7 +229,5 @@
   	cdns,tchsh-ns = <60>;
   	cdns,tslch-ns = <60>;
   	cdns,read-delay = <4>;

#address-cells = <1>;


#size-cells = <1>;

};

};
diff --git a/arch/arm/dts/k3-j7200.dtsi b/arch/arm/dts/k3-j7200.dtsi
index b7005b8031..d74f86b0f6 100644
--- a/arch/arm/dts/k3-j7200.dtsi
+++ b/arch/arm/dts/k3-j7200.dtsi
@@ -30,6 +30,8 @@
   	serial9 = &main_uart7;
   	serial10 = &main_uart8;
   	serial11 = &main_uart9;

mmc0 = &main_sdhci0;


mmc1 = &main_sdhci1;

};
chosen { };


@@ -60,7 +62,7 @@
   		i-cache-sets = <256>;
   		d-cache-size = <0x8000>;
   		d-cache-line-size = <64>;

	d-cache-sets = <128>;




	d-cache-sets = <256>;
next-level-cache = <&L2_0>;

};

@@ -74,7 +76,7 @@
   		i-cache-sets = <256>;
   		d-cache-size = <0x8000>;
   		d-cache-line-size = <64>;

	d-cache-sets = <128>;




	d-cache-sets = <256>;
next-level-cache = <&L2_0>;

};
};

@@ -82,9 +84,10 @@
   L2_0: l2-cache0 {
   	compatible = "cache";
   	cache-level = <2>;

cache-unified;

cache-size = <0x100000>;
cache-line-size = <64>;


cache-sets = <2048>;




cache-sets = <1024>;

next-level-cache = <&msmc_l3>;
};

@@ -127,6 +130,7 @@
   		 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* timesync router */
   		 <0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */
   		 <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>, /* MAIN NAVSS */

	 <0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000>, /* A72 PERIPHBASE */
 <0x00 0x70000000 0x00 0x70000000 0x00 0x00800000>, /* MSMC RAM */
 <0x00 0x18000000 0x00 0x18000000 0x00 0x08000000>, /* PCIe1 DAT0 */
 <0x41 0x00000000 0x41 0x00000000 0x01 0x00000000>, /* PCIe1 DAT1 */



-- 
2.34.1
-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

    