On 06/17/2016 08:19 AM, Peng Fan wrote:
From: Ye Li ye.li@nxp.com
- The offset for phy_status register in usbnc_regs is not correct.
- We should clear the USBNC_PHYCFG2_ACAENB bit to enable the OTG ID detection, not set it. When the bit is set, the ACA Resistance Detection is enabled, which disables the OTG ID detection, because the internal pull up is off.
So this is one patch which does two things? This should be split into two patches then.
Signed-off-by: Peng Fan peng.fan@nxp.com Signed-off-by: Ye Li ye.li@nxp.com Cc: Marek Vasut marex@denx.de Cc: Mateusz Kulikowski mateusz.kulikowski@gmail.com Cc: Stefan Agner stefan@agner.ch
drivers/usb/host/ehci-mx6.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index bb48d0d..922ef29 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -194,8 +194,9 @@ struct usbnc_regs { u32 reserve1[10]; u32 phy_cfg1; u32 phy_cfg2;
- u32 reserve2[1]; u32 phy_status;
- u32 reserve2[4];
- u32 reserve3[4];
This will also shift all the registers below by 8 bytes, is that correct ?
u32 adp_cfg1; u32 adp_cfg2; u32 adp_status; @@ -207,8 +208,11 @@ static void usb_power_config(int index) (0x10000 * index) + USBNC_OFFSET); void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2);
- /* Enable usb_otg_id detection */
- setbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB);
- /*
* Clear the ACAENB to enable usb_otg_id detection,* otherwise it is the ACA detection enabled.*/- clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB);
}
int usb_phy_mode(int port)