Albert,
Ping!
-----Original Message----- From: Tom Warren Sent: Tuesday, November 03, 2015 12:19 PM To: 'Albert ARIBAUD' albert.u.boot@aribaud.net; 'Stephen Warren' swarren@wwwdotorg.org; Tom Rini (trini@konsulko.com) trini@konsulko.com Cc: 'u-boot@lists.denx.de' u-boot@lists.denx.de; 'Simon Glass' sjg@chromium.org; Stephen Warren swarren@nvidia.com; Thierry Reding treding@nvidia.com; 'York Sun' yorksun@freescale.com; 'Michal Simek' michal.simek@xilinx.com; 'tomcwarren3959@gmail.com' tomcwarren3959@gmail.com Subject: RE: [U-Boot] [PATCH 1/4] armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY
Albert,
-----Original Message----- From: Tom Warren Sent: Tuesday, October 27, 2015 1:39 PM To: 'Albert ARIBAUD' albert.u.boot@aribaud.net; Stephen Warren swarren@wwwdotorg.org Cc: u-boot@lists.denx.de; Simon Glass sjg@chromium.org; Stephen Warren swarren@nvidia.com; Thierry Reding treding@nvidia.com; York Sun yorksun@freescale.com; Michal Simek michal.simek@xilinx.com Subject: RE: [U-Boot] [PATCH 1/4] armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY
Albert,
-----Original Message----- From: Albert ARIBAUD [mailto:albert.u.boot@aribaud.net] Sent: Wednesday, October 21, 2015 11:26 PM To: Stephen Warren swarren@wwwdotorg.org Cc: u-boot@lists.denx.de; Simon Glass sjg@chromium.org; Tom Warren TWarren@nvidia.com; Stephen Warren swarren@nvidia.com; Thierry Reding treding@nvidia.com; York Sun yorksun@freescale.com; Michal Simek michal.simek@xilinx.com Subject: Re: [U-Boot] [PATCH 1/4] armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY
Hello Stephen,
On Wed, 21 Oct 2015 10:35:59 -0600, Stephen Warren swarren@wwwdotorg.org wrote:
On 10/05/2015 12:08 PM, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
The implementation of noncached_init() uses define
MMU_SECTION_SIZE.
Define this on ARM64.
Move the prototype of noncached_{init,alloc}() to a location that doesn't depend on !defined(CONFIG_ARM64).
Note that noncached_init() calls mmu_set_region_dcache_behaviour() which relies on something having set up translation tables with 2MB block
size.
The core ARMv8 MMU setup code does not do this by default, but currently relies on SoC specific MMU setup code. Be aware of this before enabling this feature on your platform!
Albert, it looks like I forgot to add you to the CC on this email. Sorry! Could you please take a look at this series and tell me what you think? If you need a resend just let me know.
Also note that this series is a dependency for PCIe support on 64-bit Tegra systems; I guess either Tom Warren would be looking for an ack so he can apply the series to the Tegra tree, or perhaps if you just apply the whole series, he can base his branch on the branch where you apply
this.
I'll have a look at it in the coming days.
Please let me know when this series is in arm/master (or u-boot/master), as I need it to base Stephen's PCI/PCIe/XUSB patches on before I can send a PR for u-boot-tegra/master. Thanks!
I need this patchset in before I can add Stephen's PCIe/XUSB patchsets to Tegra U-Boot.
If you can Ack them, I can take them in via the Tegra repo, and send them upstream to TomR on my next PR. Or if you can let me know an ETA for getting them in to the ARM/master repo, I can base my schedule off of that. But I'm blocked until the ARMv8 MMU changes are in somewhere, and I'd like to clear this from my plate.
Thanks,
Tom
nvpublic
Tom
-- nvpublic
Amicalement,
Albert.