Hi all,
Does anybody test the cfi flash driver (cfi_flash.c) with a x8/x16 flash configured in x8 mode ? I'm trying to port U-Boot for a Lite5200B with a S29GL128N flash (CFI compliant) using the cfi flash driver. U-Boot detects the flash correctly but It's unable to erase or write the flash. In my case the following patch fix the bug but I'm not completly sure If It's only a bug with my configuration. Any suggestions? Could anybody test the patch in other architecture?
My configuration for the cfi driver is:
#define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */ #define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ #undef CONFIG_FLASH_16BIT /* Flash is 8-bit */ #define CFG_FLASH_CFI_DRIVER #define CFG_FLASH_CFI #define CFG_FLASH_BANKS_LIST {CFG_CS1_START,CFG_CS0_START}
And the patch:
--- ../tmp/u-boot/drivers/cfi_flash.c 2006-01-12 12:22:08.000000000 +0100 +++ drivers/cfi_flash.c 2006-01-12 13:35:11.000000000 +0100 @@ -107,9 +107,19 @@
#define AMD_STATUS_TOGGLE 0x40 #define AMD_STATUS_ERROR 0x20 + +#if 0 #define AMD_ADDR_ERASE_START 0x555 #define AMD_ADDR_START 0x555 #define AMD_ADDR_ACK 0x2AA +#else +int amd_addr_erase_start = 0x555; +int amd_addr_start = 0x555; +int amd_addr_ack = 0x2AA; +#define AMD_ADDR_ERASE_START amd_addr_erase_start +#define AMD_ADDR_START amd_addr_start +#define AMD_ADDR_ACK amd_addr_ack +#endif
#define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_RESP 0x10 @@ -1111,6 +1121,9 @@ ulong flash_get_size (ulong base, int ba info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */ + amd_addr_erase_start = 0xAAA; + amd_addr_start = 0xAAA; + amd_addr_ack = 0x555; } }
Best regards, Jose Maria Lopez.