Support added for HS and GP boot binaries for J7200.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices tiboot3.bin_unsigned, tispl.bin_unsigned and u-boot.img_unsigned: For GP devices
It is to be noted that the bootflow followed by J7200 requires:
tiboot3.bin: * R5 SPL * R5 SPL dtbs * TIFS * board-cfg * pm-cfg * sec-cfg * rm-cfg
tispl.bin: * DM * ATF * OPTEE * A72 SPL * A72 SPL dtbs
u-boot.img: * A72 U-Boot * A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis n-francis@ti.com --- arch/arm/dts/k3-j7200-binman.dtsi | 471 ++++++++++++++++++ .../k3-j7200-common-proc-board-u-boot.dtsi | 2 + board/ti/j721e/Kconfig | 2 + 3 files changed, 475 insertions(+) create mode 100644 arch/arm/dts/k3-j7200-binman.dtsi
diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi new file mode 100644 index 0000000000..f4906e2b4e --- /dev/null +++ b/arch/arm/dts/k3-j7200-binman.dtsi @@ -0,0 +1,471 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/ { + binman: binman { + multiple-images; + }; +}; + +#ifdef CONFIG_TARGET_J7200_R5_EVM + +&binman { + board-cfg { + filename = "board-cfg.bin"; + ti-board-config { + config = "board-cfg.yaml"; + schema = "schema.yaml"; + }; + }; + pm-cfg { + filename = "pm-cfg.bin"; + ti-board-config { + config = "pm-cfg.yaml"; + schema = "schema.yaml"; + }; + }; + rm-cfg { + filename = "rm-cfg.bin"; + ti-board-config { + config = "rm-cfg.yaml"; + schema = "schema.yaml"; + }; + }; + sec-cfg { + filename = "sec-cfg.bin"; + ti-board-config { + config = "sec-cfg.yaml"; + schema = "schema.yaml"; + }; + }; + + combined-tifs-cfg { + filename = "combined-tifs-cfg.bin"; + ti-board-config { + board-cfg { + config = "board-cfg.yaml"; + schema = "schema.yaml"; + }; + sec-cfg { + config = "sec-cfg.yaml"; + schema = "schema.yaml"; + }; + pm-cfg { + config = "pm-cfg.yaml"; + schema = "schema.yaml"; + }; + rm-cfg { + config = "rm-cfg.yaml"; + schema = "schema.yaml"; + }; + }; + }; + combined-dm-cfg { + filename = "combined-dm-cfg.bin"; + ti-board-config { + pm-cfg { + config = "pm-cfg.yaml"; + schema = "schema.yaml"; + }; + rm-cfg { + config = "rm-cfg.yaml"; + schema = "schema.yaml"; + }; + + }; + }; + + tiboot3 { + filename = "tiboot3.bin"; + ti-secure-rom { + content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>, + <&combined_dm_cfg>, <&sysfw_inner_cert>; + combined; + dm-data; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl>; + content-sysfw = <&ti_fs_enc>; + content-sysfw-data = <&combined_tifs_cfg>; + content-sysfw-inner-cert = <&sysfw_inner_cert>; + content-dm-data = <&combined_dm_cfg>; + load = <0x41c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x7f000>; + load-dm-data = <0x41c80000>; + }; + u_boot_spl: u-boot-spl { + no-expanded; + }; + ti_fs_enc: ti-fs-enc.bin { + filename = "ti-fs-firmware-j7200-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + combined_tifs_cfg: blob-ext@1 { + filename = "combined-tifs-cfg.bin"; + }; + combined_dm_cfg: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + sysfw_inner_cert: sysfw-inner-cert { + filename = "ti-fs-firmware-j7200-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + }; +}; + +&binman { + tiboot3_unsigned { + filename = "tiboot3.bin_unsigned"; + ti-secure-rom { + content = <&u_boot_spl_unsigned>, <&ti_fs_gp>, + <&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>; + combined; + dm-data; + content-sbl = <&u_boot_spl_unsigned>; + load = <0x41c00000>; + content-sysfw = <&ti_fs_gp>; + load-sysfw = <0x40000>; + content-sysfw-data = <&combined_tifs_cfg_gp>; + load-sysfw-data = <0x7f000>; + content-dm-data = <&combined_dm_cfg_gp>; + load-dm-data = <0x41c80000>; + sw-rev = <1>; + keyfile = "ti-degenerate-key.pem"; + }; + u_boot_spl_unsigned: u-boot-spl { + no-expanded; + }; + ti_fs_gp: ti-fs-gp.bin { + filename = "ti-fs-firmware-j7200-gp.bin"; + type = "blob-ext"; + optional; + }; + combined_tifs_cfg_gp: combined-tifs-cfg-gp.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + combined_dm_cfg_gp: combined-dm-cfg-gp.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; + +#endif + +#ifdef CONFIG_TARGET_J7200_A72_EVM + +#define SPL_NODTB "spl/u-boot-spl-nodtb.bin" +#define SPL_J7200_EVM_DTB "spl/dts/k3-j7200-common-proc-board.dtb" + +#define UBOOT_NODTB "u-boot-nodtb.bin" +#define J7200_EVM_DTB "arch/arm/dts/k3-j7200-common-proc-board.dtb" + +&binman { + ti-dm { + filename = "ti-dm.bin"; + blob-ext { + filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f"; + }; + }; + ti-spl { + filename = "tispl.bin"; + pad-byte = <0xff>; + + fit { + description = "Configuration to load ATF and SPL"; + #address-cells = <1>; + + images { + + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + os = "arm-trusted-firmware"; + load = <CONFIG_K3_ATF_LOAD_ADDR>; + entry = <CONFIG_K3_ATF_LOAD_ADDR>; + atf-bl31 { + }; + }; + + tee { + description = "OPTEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = <0x9e800000>; + entry = <0x9e800000>; + tee-os { + }; + }; + + dm { + description = "DM binary"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "DM"; + load = <0x89000000>; + entry = <0x89000000>; + blob-ext { + filename = "ti-dm.bin"; + }; + }; + + spl { + description = "SPL (64-bit)"; + type = "standalone"; + os = "U-Boot"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_SPL_TEXT_BASE>; + entry = <CONFIG_SPL_TEXT_BASE>; + ti-secure { + content = <&u_boot_spl_nodtb>; + keyfile = "custMpk.pem"; + }; + u_boot_spl_nodtb: blob-ext { + filename = SPL_NODTB; + }; + }; + + fdt-0 { + description = "k3-j7200-common-proc-board"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&spl_j7200_evm_dtb>; + keyfile = "custMpk.pem"; + }; + spl_j7200_evm_dtb: blob-ext { + filename = SPL_J7200_EVM_DTB; + }; + }; + + }; + + configurations { + default = "conf-0"; + + conf-0 { + description = "k3-j7200-common-proc-board"; + firmware = "atf"; + loadables = "tee", "dm", "spl"; + fdt = "fdt-0"; + }; + }; + }; + }; +}; + +&binman { + u-boot { + filename = "u-boot.img"; + pad-byte = <0xff>; + + fit { + description = "FIT image with multiple configurations"; + + images { + uboot { + description = "U-Boot for J7200 board"; + type = "firmware"; + os = "u-boot"; + arch = "arm"; + compression = "none"; + load = <CONFIG_TEXT_BASE>; + ti-secure { + content = <&u_boot_nodtb>; + keyfile = "custMpk.pem"; + }; + u_boot_nodtb: u-boot-nodtb { + }; + hash { + algo = "crc32"; + }; + }; + + fdt-0 { + description = "k3-j7200-common-proc-board"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&j7200_evm_dtb>; + keyfile = "custMpk.pem"; + }; + j7200_evm_dtb: blob-ext { + filename = J7200_EVM_DTB; + }; + hash { + algo = "crc32"; + }; + }; + }; + + configurations { + default = "conf-0"; + + conf-0 { + description = "k3-j7200-common-proc-board"; + firmware = "uboot"; + loadables = "uboot"; + fdt = "fdt-0"; + }; + + }; + }; + }; +}; + +&binman { + ti-spl_unsigned { + filename = "tispl.bin_unsigned"; + pad-byte = <0xff>; + + fit { + description = "Configuration to load ATF and SPL"; + #address-cells = <1>; + + images { + + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + os = "arm-trusted-firmware"; + load = <CONFIG_K3_ATF_LOAD_ADDR>; + entry = <CONFIG_K3_ATF_LOAD_ADDR>; + atf-bl31 { + filename = "bl31.bin"; + }; + }; + + tee { + description = "OPTEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = <0x9e800000>; + entry = <0x9e800000>; + tee-os { + filename = "tee-pager_v2.bin"; + }; + }; + + dm { + description = "DM binary"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "DM"; + load = <0x89000000>; + entry = <0x89000000>; + blob-ext { + filename = "ti-dm.bin"; + }; + }; + + spl { + description = "SPL (64-bit)"; + type = "standalone"; + os = "U-Boot"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_SPL_TEXT_BASE>; + entry = <CONFIG_SPL_TEXT_BASE>; + blob { + filename = SPL_NODTB; + }; + }; + + fdt-1 { + description = "k3-j7200-common-proc-board"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + blob { + filename = SPL_J7200_EVM_DTB; + }; + }; + }; + + configurations { + default = "conf-1"; + + conf-1 { + description = "k3-j7200-common-proc-board"; + firmware = "atf"; + loadables = "tee", "dm", "spl"; + fdt = "fdt-1"; + }; + }; + }; + }; +}; + +&binman { + u-boot_unsigned { + filename = "u-boot.img_unsigned"; + pad-byte = <0xff>; + + fit { + description = "FIT image with multiple configurations"; + + images { + uboot { + description = "U-Boot for J7200 board"; + type = "firmware"; + os = "u-boot"; + arch = "arm"; + compression = "none"; + load = <CONFIG_TEXT_BASE>; + blob { + filename = UBOOT_NODTB; + }; + hash { + algo = "crc32"; + }; + }; + + fdt-1 { + description = "k3-j7200-common-proc-board"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + blob { + filename = J7200_EVM_DTB; + }; + hash { + algo = "crc32"; + }; + }; + }; + + configurations { + default = "conf-1"; + + conf-1 { + description = "k3-j7200-common-proc-board"; + firmware = "uboot"; + loadables = "uboot"; + fdt = "fdt-1"; + }; + }; + }; + }; +}; +#endif diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi index f57c2306ba..f25c7136c9 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi @@ -3,6 +3,8 @@ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ */
+#include "k3-j7200-binman.dtsi" + / { chosen { stdout-path = "serial2:115200n8"; diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig index 4a127c4a10..e6cb21f77b 100644 --- a/board/ti/j721e/Kconfig +++ b/board/ti/j721e/Kconfig @@ -33,6 +33,7 @@ config TARGET_J7200_A72_EVM select BOARD_LATE_INIT imply TI_I2C_BOARD_DETECT select SYS_DISABLE_DCACHE_OPS + select BINMAN
config TARGET_J7200_R5_EVM bool "TI K3 based J7200 EVM running on R5" @@ -42,6 +43,7 @@ config TARGET_J7200_R5_EVM select RAM select SPL_RAM select K3_DDRSS + select BINMAN imply SYS_K3_SPL_ATF imply TI_I2C_BOARD_DETECT