This series adds full support for the LPC (Low Pin Count) bridge, the PCH (Platform Controller Hub), PCI devices like USB and SATA and more CPU init support (turbo mode, etc.)
With this series, chromebook_link can use SATA and USB at the command line.
Simon Glass (33): Add build date values to Makefile Align embedded device tree correctly Add ALIGN_DOWN() to find next smallest alignment pci: Update pci_ids.h to include some missing IDs x86: Remove board_early_init_r() x86: Panic if there is not relocation data x86: Ensure that all relocation data is included in the image WIP: x86: Drop u-boot.srec from the Makefile x86: Factor out common values in the link script rtc: mc146818: Set up RTC at start of day x86: Add ioapic.h header x86: pci: Add handlers before and after a PCI hose scan x86: config: Enable plug-and-play for link PCI pci: Add functions to read and write a BAR address x86: ivybridge: Add support for BD82x6x PCH x86: Add basic i8259 implementation x86: Add ISA DMA implementation x86: Add a simple header file for ACPI x86: ivybridge: Add PCH init x86: ivybridge: Add additional LPC init x86: dts: Move PCI peripherals into a pci node x86: dts: Add LPC settings for link x86: ivybridge: Add SATA init x86: dts: Add SATA settings for link x86: ivybridge: Set up EHCI USB x86: config: Enable USB on link x86: ivybridge: Set up XHCI USB x86: Add Intel speedstep and turbo mode code x86: Add LAPIC setup code x86: Add init for model 206AX CPU x86: Drop some msr functions that we don't support x86: ivybridge: Add northbridge init functions x86: config: Enable SPI for chromebook_link
Makefile | 12 +- arch/x86/cpu/Makefile | 2 + arch/x86/cpu/config.mk | 5 +- arch/x86/cpu/coreboot/coreboot.c | 11 - arch/x86/cpu/ivybridge/Makefile | 7 + arch/x86/cpu/ivybridge/bd82x6x.c | 135 ++++++ arch/x86/cpu/ivybridge/lpc.c | 529 +++++++++++++++++++++- arch/x86/cpu/ivybridge/model_206ax.c | 514 +++++++++++++++++++++ arch/x86/cpu/ivybridge/northbridge.c | 188 ++++++++ arch/x86/cpu/ivybridge/pch.c | 123 +++++ arch/x86/cpu/ivybridge/pci.c | 40 ++ arch/x86/cpu/ivybridge/sata.c | 243 ++++++++++ arch/x86/cpu/ivybridge/usb_ehci.c | 29 ++ arch/x86/cpu/ivybridge/usb_xhci.c | 32 ++ arch/x86/cpu/lapic.c | 68 +++ arch/x86/cpu/pci.c | 14 +- arch/x86/cpu/turbo.c | 98 ++++ arch/x86/cpu/u-boot.lds | 17 +- arch/x86/dts/link.dts | 41 +- arch/x86/include/asm/acpi.h | 24 + arch/x86/include/asm/arch-ivybridge/bd82x6x.h | 21 + arch/x86/include/asm/arch-ivybridge/model_206ax.h | 4 + arch/x86/include/asm/arch-ivybridge/pch.h | 120 +++++ arch/x86/include/asm/arch-ivybridge/sandybridge.h | 13 +- arch/x86/include/asm/i8259.h | 3 + arch/x86/include/asm/ioapic.h | 38 ++ arch/x86/include/asm/isa_dma.h | 14 + arch/x86/include/asm/lapic.h | 123 +++++ arch/x86/include/asm/msr-index.h | 2 + arch/x86/include/asm/msr.h | 11 - arch/x86/include/asm/pci.h | 3 + arch/x86/include/asm/post.h | 1 + arch/x86/include/asm/speedstep.h | 89 ++++ arch/x86/include/asm/turbo.h | 31 ++ arch/x86/lib/Makefile | 2 + arch/x86/lib/i8259.c | 134 ++++++ arch/x86/lib/isa_dma.c | 56 +++ arch/x86/lib/relocate.c | 3 + board/google/chromebook_link/link.c | 5 - common/board_r.c | 3 - doc/device-tree-bindings/ata/intel-sata.txt | 26 ++ doc/device-tree-bindings/misc/intel-lpc.txt | 47 +- drivers/pci/pci.c | 24 +- drivers/rtc/mc146818.c | 49 +- include/common.h | 15 + include/configs/chromebook_link.h | 11 +- include/fdtdec.h | 2 + include/pci.h | 23 + include/pci_ids.h | 187 +++++++- include/rtc.h | 7 + lib/fdtdec.c | 2 + scripts/Makefile.lib | 2 + 52 files changed, 3125 insertions(+), 78 deletions(-) create mode 100644 arch/x86/cpu/ivybridge/bd82x6x.c create mode 100644 arch/x86/cpu/ivybridge/model_206ax.c create mode 100644 arch/x86/cpu/ivybridge/northbridge.c create mode 100644 arch/x86/cpu/ivybridge/pch.c create mode 100644 arch/x86/cpu/ivybridge/sata.c create mode 100644 arch/x86/cpu/ivybridge/usb_ehci.c create mode 100644 arch/x86/cpu/ivybridge/usb_xhci.c create mode 100644 arch/x86/cpu/lapic.c create mode 100644 arch/x86/cpu/turbo.c create mode 100644 arch/x86/include/asm/acpi.h create mode 100644 arch/x86/include/asm/arch-ivybridge/bd82x6x.h create mode 100644 arch/x86/include/asm/ioapic.h create mode 100644 arch/x86/include/asm/isa_dma.h create mode 100644 arch/x86/include/asm/speedstep.h create mode 100644 arch/x86/include/asm/turbo.h create mode 100644 arch/x86/lib/i8259.c create mode 100644 arch/x86/lib/isa_dma.c create mode 100644 doc/device-tree-bindings/ata/intel-sata.txt