
Hi Simon,
On Wed, Feb 11, 2015 at 9:59 AM, Simon Glass sjg@chromium.org wrote:
Some systems have more than 4GB of RAM. U-Boot can only place things below 4GB so any memory above that should not be used. Ignore any such memory so that the memory size will not exceed the maximum.
This prevents gd->ram_size exceeding 4GB which causes problems for PCI devices which use DMA.
Signed-off-by: Simon Glass sjg@chromium.org
arch/x86/cpu/coreboot/sdram.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index e98a230..9c3ab81 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -90,7 +90,8 @@ int dram_init(void) struct memrange *memrange = &lib_sysinfo.memrange[i]; unsigned long long end = memrange->base + memrange->size;
if (memrange->type == CB_MEM_RAM && end > ram_size)
if (memrange->type == CB_MEM_RAM && end > ram_size &&
memrange->base < (1ULL << 32))
Can we safely assume no single entry in memrange[] lies across the 4GB boundary?
ram_size = end; } gd->ram_size = ram_size;
@@ -108,7 +109,8 @@ void dram_init_banksize(void) for (i = 0, j = 0; i < lib_sysinfo.n_memranges; i++) { struct memrange *memrange = &lib_sysinfo.memrange[i];
if (memrange->type == CB_MEM_RAM) {
if (memrange->type == CB_MEM_RAM &&
memrange->base < (1ULL << 32)) { gd->bd->bi_dram[j].start = memrange->base; gd->bd->bi_dram[j].size = memrange->size; j++;
--
Regards, Bin