
26 Feb
2014
26 Feb
'14
8:49 a.m.
Hello Michal,
Please let me confirm if I am correctly understanding Zynq SPL added by commit d7e269c.
Before that commit, Zynq booted like follows [1] Boot ROM [2] First Stage Boot Loader (created by Xilinx SDK) [3] U-Boot
Now, SPL replaces FSBL. So, now Zynq boots like follows [1] Boot ROM [2] U-Boot SPL [3] U-Boot
Is this correct?
Best Regards Masahiro Yamada