The only user of the SCU pinctrl code is pinctrl-imx8.c , fold the entire pinctrl-scu.c code into pinctrl-imx8.c and remove the matching Kconfig symbols and Makefile entries. No functional change.
Signed-off-by: Marek Vasut marex@denx.de --- Cc: Alice Guo alice.guo@nxp.com Cc: Jesse Taube mr.bossman075@gmail.com Cc: Peng Fan peng.fan@nxp.com Cc: Peter Robinson pbrobinson@gmail.com Cc: Tim Harvey tharvey@gateworks.com Cc: Tom Rini trini@konsulko.com Cc: u-boot@lists.denx.de --- drivers/pinctrl/nxp/Kconfig | 4 -- drivers/pinctrl/nxp/Makefile | 1 - drivers/pinctrl/nxp/pinctrl-imx.h | 1 - drivers/pinctrl/nxp/pinctrl-imx8.c | 71 +++++++++++++++++++++++++++ drivers/pinctrl/nxp/pinctrl-scu.c | 79 ------------------------------ 5 files changed, 71 insertions(+), 85 deletions(-) delete mode 100644 drivers/pinctrl/nxp/pinctrl-scu.c
diff --git a/drivers/pinctrl/nxp/Kconfig b/drivers/pinctrl/nxp/Kconfig index 06c26f156f6..e2fc121ae75 100644 --- a/drivers/pinctrl/nxp/Kconfig +++ b/drivers/pinctrl/nxp/Kconfig @@ -1,9 +1,6 @@ config PINCTRL_IMX bool
-config PINCTRL_IMX_SCU - bool - config PINCTRL_IMX5 bool "IMX5 pinctrl driver" depends on ARCH_MX5 && PINCTRL_FULL @@ -79,7 +76,6 @@ config PINCTRL_IMX8 depends on ARCH_IMX8 && PINCTRL_FULL select DEVRES select PINCTRL_IMX - select PINCTRL_IMX_SCU help Say Y here to enable the imx8 pinctrl driver
diff --git a/drivers/pinctrl/nxp/Makefile b/drivers/pinctrl/nxp/Makefile index f10aa6ef188..c82275a2e93 100644 --- a/drivers/pinctrl/nxp/Makefile +++ b/drivers/pinctrl/nxp/Makefile @@ -4,7 +4,6 @@ obj-$(CONFIG_PINCTRL_IMX6) += pinctrl-imx6.o obj-$(CONFIG_PINCTRL_IMX7) += pinctrl-imx7.o obj-$(CONFIG_PINCTRL_IMX7ULP) += pinctrl-imx7ulp.o obj-$(CONFIG_PINCTRL_IMX8ULP) += pinctrl-imx8ulp.o -obj-$(CONFIG_PINCTRL_IMX_SCU) += pinctrl-scu.o obj-$(CONFIG_PINCTRL_IMX8) += pinctrl-imx8.o obj-$(CONFIG_PINCTRL_IMX8M) += pinctrl-imx8m.o obj-$(CONFIG_PINCTRL_IMX93) += pinctrl-imx93.o diff --git a/drivers/pinctrl/nxp/pinctrl-imx.h b/drivers/pinctrl/nxp/pinctrl-imx.h index 94ecf1ba6b5..9adf999d3bb 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx.h +++ b/drivers/pinctrl/nxp/pinctrl-imx.h @@ -56,6 +56,5 @@ int imx_pinctrl_remove_mmio(struct udevice *dev); int imx_pinctrl_set_state_common(struct udevice *dev, struct udevice *config, int pin_size, u32 **pin_data, int *npins); int imx_pinctrl_set_state_mmio(struct udevice *dev, struct udevice *config); -int imx_pinctrl_set_state_scu(struct udevice *dev, struct udevice *config);
#endif /* __DRIVERS_PINCTRL_IMX_H */ diff --git a/drivers/pinctrl/nxp/pinctrl-imx8.c b/drivers/pinctrl/nxp/pinctrl-imx8.c index dcf778d123f..9b3b5aec07a 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx8.c +++ b/drivers/pinctrl/nxp/pinctrl-imx8.c @@ -3,6 +3,12 @@ * Copyright 2018 NXP */
+#include <dm.h> +#include <errno.h> +#include <linux/bitops.h> +#include <asm/io.h> +#include <firmware/imx/sci/sci.h> +#include <misc.h> #include <asm/global_data.h> #include <dm/device.h> #include <dm/pinctrl.h> @@ -11,6 +17,71 @@
DECLARE_GLOBAL_DATA_PTR;
+#define PADRING_IFMUX_EN_SHIFT 31 +#define PADRING_IFMUX_EN_MASK BIT(31) +#define PADRING_GP_EN_SHIFT 30 +#define PADRING_GP_EN_MASK BIT(30) +#define PADRING_IFMUX_SHIFT 27 +#define PADRING_IFMUX_MASK GENMASK(29, 27) + +static int imx_pinconf_scu_set(struct imx_pinctrl_soc_info *info, u32 pad, + u32 mux, u32 val) +{ + int ret; + + /* + * Mux should be done in pmx set, but we do not have a good api + * to handle that in scfw, so config it in pad conf func + */ + + if (!sc_rm_is_pad_owned(-1, pad)) { + debug("Pad[%u] is not owned by curr partition\n", pad); + return -EPERM; + } + + val |= PADRING_IFMUX_EN_MASK; + val |= PADRING_GP_EN_MASK; + val |= (mux << PADRING_IFMUX_SHIFT) & PADRING_IFMUX_MASK; + + ret = sc_pad_set(-1, pad, val); + if (ret) + printf("%s %d\n", __func__, ret); + + return 0; +} + +int imx_pinctrl_set_state_scu(struct udevice *dev, struct udevice *config) +{ + struct imx_pinctrl_priv *priv = dev_get_priv(dev); + struct imx_pinctrl_soc_info *info = priv->info; + int pin_id, mux, config_val; + u32 *pin_data; + int i, j = 0; + int npins; + int ret; + + ret = imx_pinctrl_set_state_common(dev, config, SHARE_IMX8_PIN_SIZE, + &pin_data, &npins); + if (ret) + return ret; + + /* + * Refer to linux documentation for details: + * Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt + */ + for (i = 0; i < npins; i++) { + pin_id = pin_data[j++]; + mux = pin_data[j++]; + config_val = pin_data[j++]; + + ret = imx_pinconf_scu_set(info, pin_id, mux, config_val); + if (ret && ret != -EPERM) + printf("Set pin %d, mux %d, val %d, error\n", pin_id, + mux, config_val); + } + + return 0; +} static struct imx_pinctrl_soc_info imx8_pinctrl_soc_info = { .flags = IMX8_USE_SCU, }; diff --git a/drivers/pinctrl/nxp/pinctrl-scu.c b/drivers/pinctrl/nxp/pinctrl-scu.c deleted file mode 100644 index 3f47dde7e78..00000000000 --- a/drivers/pinctrl/nxp/pinctrl-scu.c +++ /dev/null @@ -1,79 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2018-2019 NXP - */ - -#include <dm.h> -#include <errno.h> -#include <linux/bitops.h> -#include <asm/io.h> -#include <firmware/imx/sci/sci.h> -#include <misc.h> - -#include "pinctrl-imx.h" - -#define PADRING_IFMUX_EN_SHIFT 31 -#define PADRING_IFMUX_EN_MASK BIT(31) -#define PADRING_GP_EN_SHIFT 30 -#define PADRING_GP_EN_MASK BIT(30) -#define PADRING_IFMUX_SHIFT 27 -#define PADRING_IFMUX_MASK GENMASK(29, 27) - -static int imx_pinconf_scu_set(struct imx_pinctrl_soc_info *info, u32 pad, - u32 mux, u32 val) -{ - int ret; - - /* - * Mux should be done in pmx set, but we do not have a good api - * to handle that in scfw, so config it in pad conf func - */ - - if (!sc_rm_is_pad_owned(-1, pad)) { - debug("Pad[%u] is not owned by curr partition\n", pad); - return -EPERM; - } - - val |= PADRING_IFMUX_EN_MASK; - val |= PADRING_GP_EN_MASK; - val |= (mux << PADRING_IFMUX_SHIFT) & PADRING_IFMUX_MASK; - - ret = sc_pad_set(-1, pad, val); - if (ret) - printf("%s %d\n", __func__, ret); - - return 0; -} - -int imx_pinctrl_set_state_scu(struct udevice *dev, struct udevice *config) -{ - struct imx_pinctrl_priv *priv = dev_get_priv(dev); - struct imx_pinctrl_soc_info *info = priv->info; - int pin_id, mux, config_val; - u32 *pin_data; - int i, j = 0; - int npins; - int ret; - - ret = imx_pinctrl_set_state_common(dev, config, SHARE_IMX8_PIN_SIZE, - &pin_data, &npins); - if (ret) - return ret; - - /* - * Refer to linux documentation for details: - * Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt - */ - for (i = 0; i < npins; i++) { - pin_id = pin_data[j++]; - mux = pin_data[j++]; - config_val = pin_data[j++]; - - ret = imx_pinconf_scu_set(info, pin_id, mux, config_val); - if (ret && ret != -EPERM) - printf("Set pin %d, mux %d, val %d, error\n", pin_id, - mux, config_val); - } - - return 0; -}