
On 25/09/2020 21:36, Arnaud Patard (Rtp) wrote:
The linux code is setting polarity configuration to 3 but uboot code is setting it to 1. Change the configuration to match the linux configuration
FYI, coreboot does the same as existing code, but Linux support for this is bound to be better than both coreboot and U-Boot.
Signed-off-by: Arnaud Patard arnaud.patard@rtp-net.org Index: u-boot/drivers/video/rockchip/rk_edp.c =================================================================== --- u-boot.orig/drivers/video/rockchip/rk_edp.c +++ u-boot/drivers/video/rockchip/rk_edp.c @@ -100,10 +100,13 @@ static void rk_edp_init_refclk(struct rk ®s->dp_reserv2); }
+#define INT_POL1 (0x1 << 1) +#define INT_POL0 (0x1 << 0)
INT_POL is defined at arch/arm/include/asm/arch-rockchip/edp_rk3288.h, so these would probably go there.
static void rk_edp_init_interrupt(struct rk3288_edp *regs) { /* Set interrupt pin assertion polarity as high */
- writel(INT_POL, ®s->int_ctl);
writel(INT_POL0 | INT_POL1, ®s->int_ctl);
/* Clear pending registers */ writel(0xff, ®s->common_int_sta_1);