When CONFIG_DM_ETH is set, the FEC ethernet controller is reset after the PHY has been set up and initialzed. This breaks the communication with the PHY and results in an inoperable ethernet interface.
Do the initialization with CONFIG_DM_ETH in the same order as with legacy ETH support to fix this.
Signed-off-by: Lothar Waßmann LW@KARO-electronics.de --- drivers/net/fec_mxc.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 910879b..f61268c 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1216,17 +1216,6 @@ static int fecmxc_probe(struct udevice *dev) if (ret) return ret;
- bus = fec_get_miibus((uint32_t)priv->eth, dev_id); - if (!bus) - goto err_mii; - - priv->bus = bus; - priv->xcv_type = CONFIG_FEC_XCV_TYPE; - priv->interface = pdata->phy_interface; - ret = fec_phy_init(priv, dev); - if (ret) - goto err_phy; - /* Reset chip. */ writel(readl(&priv->eth->ecntrl) | FEC_ECNTRL_RESET, &priv->eth->ecntrl); @@ -1242,6 +1231,19 @@ static int fecmxc_probe(struct udevice *dev) fec_reg_setup(priv); priv->dev_id = (dev_id == -1) ? 0 : dev_id;
+ bus = fec_get_miibus(dev, dev_id); + if (!bus) { + ret = -ENOMEM; + goto err_mii; + } + + priv->bus = bus; + priv->xcv_type = CONFIG_FEC_XCV_TYPE; + priv->interface = pdata->phy_interface; + ret = fec_phy_init(priv, dev); + if (ret) + goto err_phy; + return 0;
err_timeout: