On 01/10/2018 11:33 AM, Jorge Ramirez-Ortiz wrote:
From: Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org
This commit adds support for 96Boards Dragonboard820C.
any feedback please?
The board is based on APQ8086 Qualcomm Soc, complying with the 96Boards specification.
Features
- 4x Kyro CPU (64 bit) up to 2.15GHz
- USB2.0
- USB3.0
- ISP
- Qualcomm Hexagon DSP
- SD 3.0 (UHS-I)
- UFS 2.0
- Qualcomm Adreno 530 GPU
- GPS
- BT 4.2
- Wi-Fi 2.4GHz, 5GHz (802.11ac)
- PCIe 2.0
- MIPI-CSI, MIPI-DSI
- I2S
U-Boot boots chained from LK (LK implements the fastboot protocol) in 64-bit mode.
For detailed build instructions see readme.txt in the board directory.
Signed-off-by: Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org
arch/arm/dts/Makefile | 3 +- arch/arm/dts/dragonboard820c.dts | 65 +++ arch/arm/mach-snapdragon/Kconfig | 10 + arch/arm/mach-snapdragon/Makefile | 2 + arch/arm/mach-snapdragon/clock-apq8096.c | 62 +++ .../mach-snapdragon/include/mach/sysmap-apq8096.h | 29 ++ arch/arm/mach-snapdragon/sysmap-apq8096.c | 32 ++ board/qualcomm/dragonboard820c/Kconfig | 15 + board/qualcomm/dragonboard820c/MAINTAINERS | 6 + board/qualcomm/dragonboard820c/Makefile | 8 + board/qualcomm/dragonboard820c/dragonboard820c.c | 128 ++++++ board/qualcomm/dragonboard820c/head.S | 34 ++ board/qualcomm/dragonboard820c/readme.txt | 463 +++++++++++++++++++++ board/qualcomm/dragonboard820c/u-boot.lds | 106 +++++ configs/dragonboard820c_defconfig | 37 ++ include/configs/dragonboard820c.h | 72 ++++ 16 files changed, 1071 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/dragonboard820c.dts create mode 100644 arch/arm/mach-snapdragon/clock-apq8096.c create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h create mode 100644 arch/arm/mach-snapdragon/sysmap-apq8096.c create mode 100644 board/qualcomm/dragonboard820c/Kconfig create mode 100644 board/qualcomm/dragonboard820c/MAINTAINERS create mode 100644 board/qualcomm/dragonboard820c/Makefile create mode 100644 board/qualcomm/dragonboard820c/dragonboard820c.c create mode 100644 board/qualcomm/dragonboard820c/head.S create mode 100644 board/qualcomm/dragonboard820c/readme.txt create mode 100644 board/qualcomm/dragonboard820c/u-boot.lds create mode 100644 configs/dragonboard820c_defconfig create mode 100644 include/configs/dragonboard820c.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a895c70..6d0587e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -211,7 +211,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1012a-rdb.dtb \ fsl-ls1012a-frdm.dtb
-dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb +dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb +dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb
dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \ stm32f769-disco.dtb diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts new file mode 100644 index 0000000..bad5a1e --- /dev/null +++ b/arch/arm/dts/dragonboard820c.dts @@ -0,0 +1,65 @@ +/*
- Qualcomm APQ8096 based Dragonboard 820C board device tree source
- (C) Copyright 2017 Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org
- SPDX-License-Identifier: GPL-2.0+
- */
+/dts-v1/;
+#include "skeleton64.dtsi"
+/ {
- model = "Qualcomm Technologies, Inc. DB820c";
- compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
- #address-cells = <2>;
- #size-cells = <2>;
- aliases {
serial0 = &blsp2_uart1;- };
- chosen {
stdout-path = "serial0:115200n8";- };
- memory {
device_type = "memory";reg = <0 0x80000000 0 0xc0000000>;- };
- psci {
compatible = "arm,psci-1.0";method = "smc";- };
- soc: soc {
#address-cells = <1>;#size-cells = <1>;ranges = <0 0 0 0xffffffff>;compatible = "simple-bus";gcc: clock-controller@300000 {compatible = "qcom,gcc-msm8996";#clock-cells = <1>;#reset-cells = <1>;#power-domain-cells = <1>;reg = <0x300000 0x90000>;};blsp2_uart1: serial@75b0000 {compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";reg = <0x75b0000 0x1000>;};sdhc2: sdhci@74a4900 {compatible = "qcom,sdhci-msm-v4";reg = <0x74a4900 0x314>, <0x74a4000 0x800>;index = <0x0>;bus-width = <4>;clock = <&gcc 0>;clock-frequency = <200000000>;};- };
+}; diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index dc7ba21..d55dc1a 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -19,8 +19,18 @@ config TARGET_DRAGONBOARD410C - HDMI - 20-pin low speed and 40-pin high speed expanders, 4 LED, 3 buttons
+config TARGET_DRAGONBOARD820C
bool "96Boards Dragonboard 820C"
help
Support for 96Boards Dragonboard 820C. This board complies with96Board Open Platform Specifications. Features:- Qualcomm Snapdragon 820C SoC - APQ8096 (4xKyro CPU)- 3GiB RAM- 32GiB UFS driveendchoice
source "board/qualcomm/dragonboard410c/Kconfig"
+source "board/qualcomm/dragonboard820c/Kconfig"
endif diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index 74f90dc..7f35c79 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -4,6 +4,8 @@ # SPDX-License-Identifier: GPL-2.0+ #
+obj-$(CONFIG_TARGET_DRAGONBOARD820C) += clock-apq8096.o +obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o obj-y += clock-snapdragon.o diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/arch/arm/mach-snapdragon/clock-apq8096.c new file mode 100644 index 0000000..3224812 --- /dev/null +++ b/arch/arm/mach-snapdragon/clock-apq8096.c @@ -0,0 +1,62 @@ +/*
- Clock drivers for Qualcomm APQ8096
- (C) Copyright 2017 Jorge Ramirez Ortiz jorge.ramirez-ortiz@linaro.org
- Based on Little Kernel driver, simplified
- SPDX-License-Identifier: BSD-3-Clause
- */
+#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/io.h> +#include <linux/bitops.h> +#include "clock-snapdragon.h"
+/* GPLL0 clock control registers */ +#define GPLL0_STATUS_ACTIVE BIT(30) +#define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0)
+static const struct bcr_regs sdc_regs = {
- .cfg_rcgr = SDCC2_CFG_RCGR,
- .cmd_rcgr = SDCC2_CMD_RCGR,
- .M = SDCC2_M,
- .N = SDCC2_N,
- .D = SDCC2_D,
+};
+static const struct gpll0_ctrl gpll0_ctrl = {
- .status = GPLL0_STATUS,
- .status_bit = GPLL0_STATUS_ACTIVE,
- .ena_vote = APCS_GPLL_ENA_VOTE,
- .vote_bit = APCS_GPLL_ENA_VOTE_GPLL0,
+};
+static int clk_init_sdc(struct msm_clk_priv *priv, uint rate) +{
- int div = 3;
- clk_enable_cbc(priv->base + SDCC2_AHB_CBCR);
- clk_rcg_set_rate_mnd(priv->base, &sdc_regs, div, 0, 0,
CFG_CLK_SRC_GPLL0);- clk_enable_gpll0(priv->base, &gpll0_ctrl);
- clk_enable_cbc(priv->base + SDCC2_APPS_CBCR);
- return rate;
+}
+ulong msm_set_rate(struct clk *clk, ulong rate) +{
- struct msm_clk_priv *priv = dev_get_priv(clk->dev);
- switch (clk->id) {
- case 0: /* SDC1 */
return clk_init_sdc(priv, rate);break;- default:
return 0;- }
+} diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h new file mode 100644 index 0000000..fb89de2 --- /dev/null +++ b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h @@ -0,0 +1,29 @@ +/*
- Qualcomm APQ8096 sysmap
- (C) Copyright 2017 Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef _MACH_SYSMAP_APQ8096_H +#define _MACH_SYSMAP_APQ8096_H
+#define TLMM_BASE_ADDR (0x1010000)
+/* Strength (sdc1) */ +#define SDC1_HDRV_PULL_CTL_REG (TLMM_BASE_ADDR + 0x0012D000)
+/* Clocks: (from CLK_CTL_BASE) */ +#define GPLL0_STATUS (0x0000) +#define APCS_GPLL_ENA_VOTE (0x52000)
+#define SDCC2_BCR (0x14000) /* block reset */ +#define SDCC2_APPS_CBCR (0x14004) /* branch control */ +#define SDCC2_AHB_CBCR (0x14008) +#define SDCC2_CMD_RCGR (0x14010) +#define SDCC2_CFG_RCGR (0x14014) +#define SDCC2_M (0x14018) +#define SDCC2_N (0x1401C) +#define SDCC2_D (0x14020)
+#endif diff --git a/arch/arm/mach-snapdragon/sysmap-apq8096.c b/arch/arm/mach-snapdragon/sysmap-apq8096.c new file mode 100644 index 0000000..cb6d1e4 --- /dev/null +++ b/arch/arm/mach-snapdragon/sysmap-apq8096.c @@ -0,0 +1,32 @@ +/*
- Qualcomm APQ8096 memory map
- (C) Copyright 2017 Jorge Ramirez Ortiz jorge.ramirez-ortiz@linaro.org
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <asm/armv8/mmu.h>
+static struct mm_region apq8096_mem_map[] = {
- {
.virt = 0x0UL, /* Peripheral block */.phys = 0x0UL, /* Peripheral block */.size = 0x10000000UL,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN- }, {
.virt = 0x80000000UL, /* DDR */.phys = 0x80000000UL, /* DDR */.size = 0xC0000000UL,.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |PTE_BLOCK_INNER_SHARE- }, {
/* List terminator */0,- }
+};
+struct mm_region *mem_map = apq8096_mem_map; diff --git a/board/qualcomm/dragonboard820c/Kconfig b/board/qualcomm/dragonboard820c/Kconfig new file mode 100644 index 0000000..aff9af5 --- /dev/null +++ b/board/qualcomm/dragonboard820c/Kconfig @@ -0,0 +1,15 @@ +if TARGET_DRAGONBOARD820C
+config SYS_BOARD
- default "dragonboard820c"
+config SYS_VENDOR
- default "qualcomm"
+config SYS_SOC
- default "apq8096"
+config SYS_CONFIG_NAME
- default "dragonboard820c"
+endif diff --git a/board/qualcomm/dragonboard820c/MAINTAINERS b/board/qualcomm/dragonboard820c/MAINTAINERS new file mode 100644 index 0000000..a157033 --- /dev/null +++ b/board/qualcomm/dragonboard820c/MAINTAINERS @@ -0,0 +1,6 @@ +DRAGONBOARD820C BOARD +M: Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org +S: Maintained +F: board/qualcomm/dragonboard820c/ +F: include/configs/dragonboard820c.h +F: configs/dragonboard820c_defconfig diff --git a/board/qualcomm/dragonboard820c/Makefile b/board/qualcomm/dragonboard820c/Makefile new file mode 100644 index 0000000..a1ce4b2 --- /dev/null +++ b/board/qualcomm/dragonboard820c/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2017 Jorge Ramirez-Ortiz jorge.ramirez-ortiz@gmail.com +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y := dragonboard820c.o +extra-y += head.o diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c b/board/qualcomm/dragonboard820c/dragonboard820c.c new file mode 100644 index 0000000..8f40ba4 --- /dev/null +++ b/board/qualcomm/dragonboard820c/dragonboard820c.c @@ -0,0 +1,128 @@ +/*
- Board init file for Dragonboard 820C
- (C) Copyright 2017 Jorge Ramirez-Ortiz jorge.ramirez-ortiz@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <asm/arch/sysmap-apq8096.h> +#include <linux/arm-smccc.h> +#include <linux/psci.h> +#include <common.h> +#include <dm.h> +#include <asm/io.h> +#include <linux/bitops.h> +#include <asm/psci.h>
+DECLARE_GLOBAL_DATA_PTR;
+int dram_init(void) +{
- gd->ram_size = PHYS_SDRAM_SIZE;
- return 0;
+}
+int dram_init_banksize(void) +{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- return 0;
+}
+static void sdhci_power_init(void) +{
- const uint32_t TLMM_PULL_MASK = 0x3;
- const uint32_t TLMM_HDRV_MASK = 0x7;
- struct tlmm_cfg {
uint32_t bit; /* bit in the register */uint8_t mask; /* mask clk/dat/cmd control */uint8_t val;- };
- /* bit offsets in the sdc tlmm register */
- enum { SDC1_DATA_HDRV = 0,
SDC1_CMD_HDRV = 3,SDC1_CLK_HDRV = 6,SDC1_DATA_PULL = 9,SDC1_CMD_PULL = 11,SDC1_CLK_PULL = 13,SDC1_RCLK_PULL = 15,- };
- enum { TLMM_PULL_DOWN = 0x1,
TLMM_PULL_UP = 0x3,TLMM_NO_PULL = 0x0,- };
- enum { TLMM_CUR_VAL_10MA = 0x04,
TLMM_CUR_VAL_16MA = 0x07,- };
- int i;
- /* drive strength configs for sdhc pins */
- const struct tlmm_cfg hdrv[] =
- {
{ SDC1_CLK_HDRV, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, },{ SDC1_CMD_HDRV, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, },{ SDC1_DATA_HDRV, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, },- };
- /* pull configs for sdhc pins */
- const struct tlmm_cfg pull[] =
- {
{ SDC1_CLK_PULL, TLMM_NO_PULL, TLMM_PULL_MASK, },{ SDC1_CMD_PULL, TLMM_PULL_UP, TLMM_PULL_MASK, },{ SDC1_DATA_PULL, TLMM_PULL_UP, TLMM_PULL_MASK, },- };
- const struct tlmm_cfg rclk[] =
- {
{ SDC1_RCLK_PULL, TLMM_PULL_DOWN, TLMM_PULL_MASK,},- };
- for (i = 0; i < ARRAY_SIZE(hdrv); i++)
clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG,hdrv[i].mask << hdrv[i].bit,hdrv[i].val << hdrv[i].bit);- for (i = 0; i < ARRAY_SIZE(pull); i++)
clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG,pull[i].mask << pull[i].bit,pull[i].val << pull[i].bit);- for (i = 0; i < ARRAY_SIZE(rclk); i++)
clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG,rclk[i].mask << rclk[i].bit,rclk[i].val << rclk[i].bit);+}
+static void show_psci_version(void) +{
- struct arm_smccc_res res;
- arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
- printf("PSCI: v%ld.%ld\n",
PSCI_VERSION_MAJOR(res.a0),PSCI_VERSION_MINOR(res.a0));+}
+int board_init(void) +{
- sdhci_power_init();
- show_psci_version();
- return 0;
+}
+void reset_cpu(ulong addr) +{
- psci_system_reset();
+} diff --git a/board/qualcomm/dragonboard820c/head.S b/board/qualcomm/dragonboard820c/head.S new file mode 100644 index 0000000..06d82d5 --- /dev/null +++ b/board/qualcomm/dragonboard820c/head.S @@ -0,0 +1,34 @@ +/*
- ARM64 header for proper chain-loading with Little Kernel.
- Little Kernel shipped with Dragonboard820C boots standard Linux images for
- ARM64. This file adds header that is required to boot U-Boot properly.
- For details see:
- (C) Copyright 2015 Mateusz Kulikowski mateusz.kulikowski@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <config.h>
+/*
- per document in linux/Doc/arm64/booting.text
- */
+.global _arm64_header +_arm64_header:
- b _start
- .word 0
- .quad CONFIG_SYS_TEXT_BASE-PHYS_SDRAM_1 /* Image load offset, LE */
- .quad 0 /* Effective size of kernel image, little-endian */
- .quad 0 /* kernel flags, little-endian */
- .quad 0 /* reserved */
- .quad 0 /* reserved */
- .quad 0 /* reserved */
- .byte 0x41 /* Magic number, "ARM\x64" */
- .byte 0x52
- .byte 0x4d
- .byte 0x64
- .word 0 /* reserved (used for PE COFF offset) */
diff --git a/board/qualcomm/dragonboard820c/readme.txt b/board/qualcomm/dragonboard820c/readme.txt new file mode 100644 index 0000000..88adb85 --- /dev/null +++ b/board/qualcomm/dragonboard820c/readme.txt @@ -0,0 +1,459 @@ +# +# (C) Copyright 2017 Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org +# +# SPDX-License-Identifier: GPL-2.0+ +#
+================================================================================
What is working (enough to boot a distro from SD card)+================================================================================
- UART
- SD card
- PSCI reset
- Environment in EXT4 partition 1 in SD card (check defconfig for details)
dont forget to insert the card in the SD slot before booting if youare going to make mods to the environment+================================================================================
Build & Run instructions+================================================================================
+1) Install mkbootimg and dtbTool from Codeaurora:
- git://codeaurora.org/quic/kernel/skales
- commit 8492547e404e969262d9070dee9bdd15668bb70f worked for me.
+2) Setup CROSS_COMPILE to aarch64 compiler or if you use ccache just do
- CROSS_COMPILE="ccache aarch64-linux-gnu-"
+3) cd to the u-boot tree
- $ make dragonboard820c_config
- $ make -j `nproc`
+4) generate fake, empty ramdisk (can have 0 bytes)
- $ touch rd
+5) Generate qualcomm device tree table with dtbTool
- $ dtbTool -o dt.img arch/arm/dts
+6) Generate Android boot image with mkbootimg:
- $ mkbootimg --kernel=u-boot-dtb.bin \
--output=u-boot.img \--dt=dt.img \--pagesize 4096 \--base 0x80000000 \--ramdisk=rd \--cmdline=""+7) Reboot the board into fastboot mode
- plug the board micro-usb to your laptop usb host.
- reboot the board with vol- button pressed
+8) Boot the uboot image using fastboot
- $ fastboot boot u-boot.img
- or flash it to the UFS drive boot partition:
- $ fastboot flash boot u-boot.img
- $ fastboot reboot
+================================================================================
To boot a linux kernel from SDHCI with the ROOTFS on an NFS share:+================================================================================
+1) create an EXT4 partition on the SD card (must be partition #1)
+2) build the kernel image and dtb (documented extensively somewhere else)
+3) copy the drivers to the NFS partition (ie: 192.168.1.2 /exports/db820c-rootfs)
+4) add the u-boot headers to the image:
- $ mkimage -A arm64 \
-O linux \-C none \-T kernel \-a 0x80080000 \-e 0x80080000 \-n Dragonboard820c \-d $kernel/arch/arm64/boot/Image \uImage+5) copy the generated uImage and the device tree binary to the SD card EXT4
- partition
- $ cp uImage /mnt/boot/
- $ cp apq8096-db820c.dtb /mnt/boot/
+6) on the SD card create /extlinux/extlinux.conf as follows:
- default nfs
- prompt 1
- timeout 10
- LABEL nfs
MENU NFS entryLINUX /uImageFDT /apq8096-db820c.dtbAPPEND root=/dev/nfs rw \nfsroot=192.168.1.2:/exports/db829c-rootfs,v3,tcp \rootwait \ip=dhcp consoleblank=0 \console=tty0 \console=ttyMSM0,115200n8 \earlyprintk earlycon=msm_serial_dm,0x75b0000 \androidboot.bootdevice=624000.ufshc \androidboot.verifiedbootstate=orange \androidboot.ver0+7) remove the SD card from the laptop and insert it back to the db820 board.
- the SD card EXT4 partition#1 should contain:
/uImage/apq8096-db820c.dtb/extlinux/extlinux.conf+8) reboot the db820 board
+================================================================================
Successful boot sequence+================================================================================
+Format: Log Type - Time(microsec) - Message - Optional Info +Log Type: B - Since Boot(Power On Reset), D - Delta, S - Statistic +S - QC_IMAGE_VERSION_STRING=BOOT.XF.1.0-00301 +S - IMAGE_VARIANT_STRING=M8996LAB +S - OEM_IMAGE_VERSION_STRING=crm-ubuntu68 +S - Boot Interface: UFS +S - Secure Boot: Off +S - Boot Config @ 0x00076044 = 0x000001c9 +S - JTAG ID @ 0x000760f4 = 0x4003e0e1 +S - OEM ID @ 0x000760f8 = 0x00000000 +S - Serial Number @ 0x00074138 = 0x2e8844ce +S - OEM Config Row 0 @ 0x00074188 = 0x0000000000000000 +S - OEM Config Row 1 @ 0x00074190 = 0x0000000000000000 +S - Feature Config Row 0 @ 0x000741a0 = 0x0050000010000100 +S - Feature Config Row 1 @ 0x000741a8 = 0x00fff00001ffffff +S - Core 0 Frequency, 1228 MHz +B - 0 - PBL, Start +B - 10412 - bootable_media_detect_entry, Start +B - 47480 - bootable_media_detect_success, Start +B - 47481 - elf_loader_entry, Start +B - 49027 - auth_hash_seg_entry, Start +B - 49129 - auth_hash_seg_exit, Start +B - 82403 - elf_segs_hash_verify_entry, Start +B - 84905 - PBL, End +B - 86955 - SBL1, Start +B - 182969 - usb: hs_phy_nondrive_start +B - 183305 - usb: PLL lock success - 0x3 +B - 186294 - usb: hs_phy_nondrive_finish +B - 190442 - boot_flash_init, Start +D - 30 - boot_flash_init, Delta +B - 197548 - sbl1_ddr_set_default_params, Start +D - 30 - sbl1_ddr_set_default_params, Delta +B - 205509 - boot_config_data_table_init, Start +D - 200659 - boot_config_data_table_init, Delta - (60 Bytes) +B - 410713 - CDT Version:3,Platform ID:24,Major ID:1,Minor ID:0,Subtype:0 +B - 415410 - Image Load, Start +D - 22570 - PMIC Image Loaded, Delta - (37272 Bytes) +B - 437980 - pm_device_init, Start +B - 443744 - PON REASON:PM0:0x200000061 PM1:0x200000021 +B - 480161 - PM_SET_VAL:Skip +D - 40016 - pm_device_init, Delta +B - 482083 - pm_driver_init, Start +D - 2928 - pm_driver_init, Delta +B - 488671 - pm_sbl_chg_init, Start +D - 91 - pm_sbl_chg_init, Delta +B - 495442 - vsense_init, Start +D - 0 - vsense_init, Delta +B - 505171 - Pre_DDR_clock_init, Start +D - 396 - Pre_DDR_clock_init, Delta +B - 509045 - ddr_initialize_device, Start +B - 512766 - 8996 v3.x detected, Max frequency = 1.8 GHz +B - 522373 - ddr_initialize_device, Delta +B - 522404 - DDR ID, Rank 0, Rank 1, 0x6, 0x300, 0x300 +B - 526247 - Basic DDR tests done +B - 594994 - clock_init, Start +D - 274 - clock_init, Delta +B - 598349 - Image Load, Start +D - 4331 - QSEE Dev Config Image Loaded, Delta - (46008 Bytes) +B - 603808 - Image Load, Start +D - 5338 - APDP Image Loaded, Delta - (0 Bytes) +B - 612409 - usb: UFS Serial - 2f490ecf +B - 616801 - usb: fedl, vbus_low +B - 620431 - Image Load, Start +D - 55418 - QSEE Image Loaded, Delta - (1640572 Bytes) +B - 675849 - Image Load, Start +D - 2013 - SEC Image Loaded, Delta - (4096 Bytes) +B - 683413 - sbl1_efs_handle_cookies, Start +D - 457 - sbl1_efs_handle_cookies, Delta +B - 691892 - Image Load, Start +D - 14396 - QHEE Image Loaded, Delta - (254184 Bytes) +B - 706319 - Image Load, Start +D - 14061 - RPM Image Loaded, Delta - (223900 Bytes) +B - 721111 - Image Load, Start +D - 3233 - STI Image Loaded, Delta - (0 Bytes) +B - 727913 - Image Load, Start +D - 34709 - APPSBL Image Loaded, Delta - (748716 Bytes) +B - 762713 - SBL1, End +D - 680028 - SBL1, Delta +S - Flash Throughput, 94000 KB/s (2959024 Bytes, 31250 us) +S - DDR Frequency, 1017 MHz +Android Bootloader - UART_DM Initialized!!!
+[0] BUILD_VERSION= +[0] BUILD_DATE=16:07:51 - Nov 17 2017 +[0] welcome to lk +[10] platform_init() +[10] target_init() +[10] RPM GLink Init +[10] Opening RPM Glink Port success +[10] Opening SSR Glink Port success +[20] Glink Connection between APPS and RPM established +[20] Glink Connection between APPS and RPM established +[40] UFS init success +[80] Qseecom Init Done in Appsbl +[80] secure app region addr=0x86600000 size=0x2200000[90] TZ App region notif returned with status:0 addr:86600000 size:35651584 +[100] TZ App log region register returned with status:0 addr:916d4000 size:4096 +[100] Qseecom TZ Init Done in Appsbl +[120] Loading cmnlib done +[120] qseecom_start_app: Loading app keymaster for the first time +[150] <8>keymaster: ""KEYMASTER Init "" +[160] Selected panel: none +Skip panel configuration +[160] pm8x41_get_is_cold_boot: cold boot +[170] boot_verifier: Device is in ORANGE boot state. +[180] Device is unlocked! Skipping verification... +[180] Loading (boot) image (348160): start +[190] Loading (boot) image (348160): done +[190] use_signed_kernel=1, is_unlocked=1, is_tampered=0. +[200] Your device has been unlocked and cant be trusted. +Wait for 5 seconds before proceeding
+[5200] mdtp: mdtp_img loaded +[5210] mdtp: is_test_mode: test mode is set to 1 +[5210] mdtp: read_metadata: SUCCESS +[5230] LK SEC APP Handle: 0x1 +[5230] Return value from recv_data: 14 +[5240] Return value from recv_data: 14 +[5250] Return value from recv_data: 14 +[5260] DTB Total entry: 1, DTB version: 3 +[5260] Using DTB entry 0x00000123/00000000/0x00000018/0 for device 0x00000123/00030001/0x00010018/0 +[5270] cmdline: androidboot.bootdevice=624000.ufshc androidboot.verifiedbootstate=orange androidboot.veritymode=enforcing androidboot.serialno=2f490ecf androidboot.baseband=apq mdss_mdp.panel=0 +[5290] Updating device tree: start +[5290] Updating device tree: done +[5290] Return value from recv_data: 14 +[5300] RPM GLINK UnInit +[5300] Qseecom De-Init Done in Appsbl +[5300] booting linux @ 0x80080000, ramdisk @ 0x82200000 (0), tags/device tree @ 0x82000000 +[5310] Jumping to kernel via monitor
+U-Boot 2017.11-00145-ge895117 (Nov 29 2017 - 10:04:06 +0100) +Qualcomm-DragonBoard 820C
+DRAM: 3 GiB +PSCI: v1.0 +MMC: sdhci@74a4900: 0 +In: serial@75b0000 +Out: serial@75b0000 +Err: serial@75b0000 +Net: Net Initialization Skipped +No ethernet found. +Hit any key to stop autoboot: 0 +switch to partitions #0, OK +mmc0 is current device +Scanning mmc 0:1... +Found /extlinux/extlinux.conf +Retrieving file: /extlinux/extlinux.conf +433 bytes read in 71 ms (5.9 KiB/s) +1: nfs root
+Retrieving file: /uImage +19397184 bytes read in 2024 ms (9.1 MiB/s) +append: root=/dev/nfs rw nfsroot=192.168.1.2:/db820c/rootfs,v3,tcp rootwait ip=dhcp consoleblank=0 console=tty0 console=ttyMSM0,115200n8 earlyprintk earlycon=msm_serial_dm,0x75b0000 androidboot.bootdevice=624000.ufshc androidboot.verifiedbootstate=orange androidboot.ver0
+Retrieving file: /apq8096-db820c.dtb +38134 bytes read in 37 ms (1005.9 KiB/s)
+## Booting kernel from Legacy Image at 95000000 ...
- Image Name: Dragonboard820c
- Image Type: AArch64 Linux Kernel Image (uncompressed)
- Data Size: 19397120 Bytes = 18.5 MiB
- Load Address: 80080000
- Entry Point: 80080000
- Verifying Checksum ... OK
+## Flattened Device Tree blob at 93000000
- Booting using the fdt blob at 0x93000000
- Loading Kernel Image ... OK
- Using Device Tree in place at 0000000093000000, end 000000009300c4f5
+Starting kernel ...
+[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Linux version 4.11.3-30039-g5a922a1 (jramirez@igloo) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-2017.05) ) #1 SMP PREEMPT Wed Oct 18 10:21:11 CEST 2017 +[ 0.000000] Boot CPU: AArch64 Processor [511f2112] +[ 0.000000] earlycon: msm_serial_dm0 at MMIO 0x00000000075b0000 (options '') +[ 0.000000] bootconsole [msm_serial_dm0] enabled +[ 0.000000] efi: Getting EFI parameters from FDT: +[ 0.000000] efi: UEFI not found. +[ 0.000000] OF: reserved mem: OVERLAP DETECTED! +[ 0.000000] adsp@8ea00000 (0x000000008ea00000--0x0000000090400000) overlaps with gpu@8f200000 (0x000000008f200000--0x000000008f300000) +[ 0.000000] Reserved memory: created DMA memory pool at 0x000000008f200000, size 1 MiB +[ 0.000000] OF: reserved mem: initialized node gpu@8f200000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000090400000, size 8 MiB +[ 0.000000] OF: reserved mem: initialized node venus@90400000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 128 MiB at 0x00000000b8000000 +[ 0.000000] NUMA: No NUMA configuration found +[ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x00000000bfffffff] +[ 0.000000] NUMA: Adding memblock [0x80000000 - 0x857fffff] on node 0 +[ 0.000000] NUMA: Adding memblock [0x91800000 - 0xbfffffff] on node 0 +[ 0.000000] NUMA: Initmem setup node 0 [mem 0x80000000-0xbfffffff] +[ 0.000000] NUMA: NODE_DATA [mem 0xb7fb6680-0xb7fb817f] +[ 0.000000] Zone ranges: +[ 0.000000] DMA [mem 0x0000000080000000-0x00000000bfffffff] +[ 0.000000] Normal empty +[ 0.000000] Movable zone start for each node +[ 0.000000] Early memory node ranges +[ 0.000000] node 0: [mem 0x0000000080000000-0x00000000857fffff] +[ 0.000000] node 0: [mem 0x0000000091800000-0x00000000bfffffff] +[ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000bfffffff] +[ 0.000000] psci: probing for conduit method from DT. +[ 0.000000] psci: PSCIv1.0 detected in firmware. +[ 0.000000] psci: Using standard PSCI v0.2 function IDs +[ 0.000000] psci: MIGRATE_INFO_TYPE not supported. +[ 0.000000] percpu: Embedded 23 pages/cpu @ffff8000de9a3000 s57240 r8192 d28776 u94208 +[ 0.000000] pcpu-alloc: s57240 r8192 d28776 u94208 alloc=23*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 +[ 0.000000] Detected PIPT I-cache on CPU0 +[ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 720293 +[ 0.000000] Policy zone: Normal +[ 0.000000] Kernel command line: root=/dev/nfs rw nfsroot=192.168.1.2:/db820c/rootfs,v3,tcp rootwait ip=dhcp consoleblank=0 +console=tty0 console=ttyMSM0,115200n8 earlyprintk earlycon=msm_serial_dm,0x75b0000 androidboot.bootdevice=624000.ufshc androidboot.verifiedbootstate=orange a +ndroidboot.ver0 +[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.000000] software IO TLB [mem 0xd3fff000-0xd7fff000] (64MB) mapped at [ffff800053fff000-ffff800057ffefff] +[ 0.000000] Memory: 2644172K/2926908K available (11196K kernel code, 1470K rwdata, 5132K rodata, 1088K init, 449K bss, 151664K reserved, 131072K cma-reser +ved) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] modules : 0xffff000000000000 - 0xffff000008000000 ( 128 MB) +[ 0.000000] vmalloc : 0xffff000008000000 - 0xffff7dffbfff0000 (129022 GB) +[ 0.000000] .text : 0xffff000008080000 - 0xffff000008b70000 ( 11200 KB) +[ 0.000000] .rodata : 0xffff000008b70000 - 0xffff000009080000 ( 5184 KB) +[ 0.000000] .init : 0xffff000009080000 - 0xffff000009190000 ( 1088 KB) +[ 0.000000] .data : 0xffff000009190000 - 0xffff0000092ffa00 ( 1471 KB) +[ 0.000000] .bss : 0xffff0000092ffa00 - 0xffff00000937014c ( 450 KB) +[ 0.000000] fixed : 0xffff7dfffe7fd000 - 0xffff7dfffec00000 ( 4108 KB) +[ 0.000000] PCI I/O : 0xffff7dfffee00000 - 0xffff7dffffe00000 ( 16 MB) +[ 0.000000] vmemmap : 0xffff7e0000000000 - 0xffff800000000000 ( 2048 GB maximum) +[ 0.000000] 0xffff7e0000000000 - 0xffff7e00037a93c0 ( 55 MB actual) +[ 0.000000] memory : 0xffff800000000000 - 0xffff8000dea4f000 ( 3562 MB) +[ 0.000000] SLUB: HWalign=128, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 64. +[ 0.000000] RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=4. +[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=4 +[ 0.000000] NR_IRQS:64 nr_irqs:64 0 +[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000009c00000 +[ 0.000000] GICv2m: range[mem 0x09bd0000-0x09bd0fff], SPI[544:639] +[ 0.000000] arm_arch_timer: Architected cp15 and mmio timer(s) running at 19.20MHz (virt/virt). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x46d987e47, max_idle_ns: 440795202767 ns +[ 0.000002] sched_clock: 56 bits at 19MHz, resolution 52ns, wraps every 4398046511078ns
+[....]
+Some kernel information:
+root@linaro-developer:~# cat /proc/cpuinfo +processor : 0 +BogoMIPS : 38.40 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid +CPU implementer : 0x51 +CPU architecture: 8 +CPU variant : 0x1 +CPU part : 0x211 +CPU revision : 2
+processor : 1 +BogoMIPS : 38.40 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid +CPU implementer : 0x51 +CPU architecture: 8 +CPU variant : 0x1 +CPU part : 0x211 +CPU revision : 2
+processor : 2 +BogoMIPS : 38.40 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid +CPU implementer : 0x51 +CPU architecture: 8 +CPU variant : 0x1 +CPU part : 0x205 +CPU revision : 2
+processor : 3 +BogoMIPS : 38.40 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid +CPU implementer : 0x51 +CPU architecture: 8 +CPU variant : 0x1 +CPU part : 0x205 +CPU revision : 2
+root@linaro-developer:~# uname -a +Linux linaro-developer 4.11.3-30039-g5a922a1 #1 SMP PREEMPT Wed Oct 18 10:21:11 CEST 2017 aarch64 GNU/Linux
+root@linaro-developer:~# cat /proc/cmdline +root=/dev/nfs rw nfsroot=192.168.1.2:/db820c/rootfs,v3,tcp rootwait ip=dhcp consoleblank=0 console=tty0 console=ttyMSM0,115200n8 earlyprintk earlycon=msm_serial_dm,0x75b0000 androidboot.bootdevice=624000.ufshc androidboot.verifiedbootstate=orange androidboot.ver0
+root@linaro-developer:~# cat /proc/meminfo +MemTotal: 2776332 kB +MemFree: 2593696 kB +MemAvailable: 2561432 kB +Buffers: 0 kB +Cached: 94744 kB +SwapCached: 0 kB +Active: 43888 kB +Inactive: 72972 kB +Active(anon): 22968 kB +Inactive(anon): 24616 kB +Active(file): 20920 kB +Inactive(file): 48356 kB +Unevictable: 0 kB +Mlocked: 0 kB +SwapTotal: 0 kB +SwapFree: 0 kB +Dirty: 0 kB +Writeback: 0 kB +AnonPages: 22120 kB +Mapped: 29284 kB +Shmem: 25468 kB +Slab: 32876 kB +SReclaimable: 12924 kB +SUnreclaim: 19952 kB +KernelStack: 2144 kB +PageTables: 928 kB +NFS_Unstable: 0 kB +Bounce: 0 kB +WritebackTmp: 0 kB +CommitLimit: 1388164 kB +Committed_AS: 204192 kB +VmallocTotal: 135290290112 kB +VmallocUsed: 0 kB +VmallocChunk: 0 kB +AnonHugePages: 2048 kB +ShmemHugePages: 0 kB +ShmemPmdMapped: 0 kB +CmaTotal: 131072 kB +CmaFree: 130356 kB +HugePages_Total: 0 +HugePages_Free: 0 +HugePages_Rsvd: 0 +HugePages_Surp: 0 +Hugepagesize: 2048 kB diff --git a/board/qualcomm/dragonboard820c/u-boot.lds b/board/qualcomm/dragonboard820c/u-boot.lds new file mode 100644 index 0000000..b84b4ac --- /dev/null +++ b/board/qualcomm/dragonboard820c/u-boot.lds @@ -0,0 +1,106 @@ +/*
- Override linker script for fastboot-readable images
- (C) Copyright 2015 Mateusz Kulikowski mateusz.kulikowski@gmail.com
- Based on arch/arm/cpu/armv8/u-boot.lds (Just add header)
- SPDX-License-Identifier: GPL-2.0+
- */
+OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") +OUTPUT_ARCH(aarch64) +ENTRY(_arm64_header) +SECTIONS +{
- . = 0x00000000;
- . = ALIGN(8);
- .text :
- {
*(.__image_copy_start)board/qualcomm/dragonboard820c/head.o (.text*)CPUDIR/start.o (.text*)*(.text*)- }
- . = ALIGN(8);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
- . = ALIGN(8);
- .data : {
*(.data*)- }
- . = ALIGN(8);
- . = .;
- . = ALIGN(8);
- .u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));- }
- . = ALIGN(8);
- .efi_runtime : {
__efi_runtime_start = .;*(efi_runtime_text)*(efi_runtime_data)__efi_runtime_stop = .;- }
- .efi_runtime_rel : {
__efi_runtime_rel_start = .;*(.relaefi_runtime_text)*(.relaefi_runtime_data)__efi_runtime_rel_stop = .;- }
- . = ALIGN(8);
- .image_copy_end :
- {
*(.__image_copy_end)- }
- . = ALIGN(8);
- .rel_dyn_start :
- {
*(.__rel_dyn_start)- }
- .rela.dyn : {
*(.rela*)- }
- .rel_dyn_end :
- {
*(.__rel_dyn_end)- }
- _end = .;
- . = ALIGN(8);
- .bss_start : {
KEEP(*(.__bss_start));- }
- .bss : {
*(.bss*). = ALIGN(8);- }
- .bss_end : {
KEEP(*(.__bss_end));- }
- /DISCARD/ : { *(.dynsym) }
- /DISCARD/ : { *(.dynstr*) }
- /DISCARD/ : { *(.dynamic*) }
- /DISCARD/ : { *(.plt*) }
- /DISCARD/ : { *(.interp*) }
- /DISCARD/ : { *(.gnu*) }
+} diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig new file mode 100644 index 0000000..788ff28 --- /dev/null +++ b/configs/dragonboard820c_defconfig @@ -0,0 +1,36 @@ +CONFIG_ARM=y +CONFIG_ARM_SMCCC=y +CONFIG_ARCH_SNAPDRAGON=y +CONFIG_TARGET_DRAGONBOARD820C=y +CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C" +CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c" +CONFIG_USE_BOOTARGS=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOOTARGS="console=ttyMSM0,115200n8" +CONFIG_SYS_PROMPT="dragonboard820c => " +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTEFI=y +CONFIG_EFI_LOADER=y +CONFIG_CMD_BOOTEFI_HELLO=y +CONFIG_CMD_PXE=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_PART=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_OF_CONTROL=y +CONFIG_MSM_SERIAL=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_SDHCI=y +CONFIG_DM_MMC=y +CONFIG_CLK=y +CONFIG_PSCI_RESET=y +CONFIG_ENV_IS_IN_EXT4=y +CONFIG_ENV_EXT4_INTERFACE="mmc" +CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1" +CONFIG_ENV_EXT4_FILE="/uboot.env" diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h new file mode 100644 index 0000000..76bcaf8 --- /dev/null +++ b/include/configs/dragonboard820c.h @@ -0,0 +1,72 @@ +/*
- Board configuration file for Dragonboard 410C
- (C) Copyright 2017 Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __CONFIGS_DRAGONBOARD820C_H +#define __CONFIGS_DRAGONBOARD820C_H
+#include <linux/sizes.h> +#include <asm/arch/sysmap-apq8096.h>
+/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 2
+#define PHYS_SDRAM_SIZE 0xC0000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_1_SIZE 0x60000000 +#define PHYS_SDRAM_2 0x100000000 +#define PHYS_SDRAM_2_SIZE 0x5ea4ffff
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_TEXT_BASE 0x80080000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000) +#define CONFIG_SYS_BOOTM_LEN SZ_64M +#define CONFIG_SYS_LDSCRIPT "board/qualcomm/dragonboard820c/u-boot.lds"
+/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 19000000
+/* Partition table support */ +#define HAVE_BLOCK_DEVICE
+/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE
+#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> +#include <config_distro_bootcmd.h> +#endif
+#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 0)
+#define CONFIG_EXTRA_ENV_SETTINGS \
- "loadaddr=0x95000000\0" \
- "fdt_high=0xffffffffffffffff\0" \
- "initrd_high=0xffffffffffffffff\0" \
- "linux_image=uImage\0" \
- "kernel_addr_r=0x95000000\0"\
- "fdtfile=qcom/apq8096-db820c.dtb\0" \
- "fdt_addr_r=0x93000000\0"\
- "ramdisk_addr_r=0x91000000\0"\
- "scriptaddr=0x90000000\0"\
- "pxefile_addr_r=0x90100000\0"\
- BOOTENV
+#define CONFIG_EXT4_WRITE +#define CONFIG_ENV_SIZE 0x4000 +#define CONFIG_ENV_VARS_UBOOT_CONFIG
+/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
+/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 +#define CONFIG_SYS_MAXARGS 64
+#endif
2.7.4