Greetings,
I'm adding support to a 1GiB DDR3 chip that internally has two dies. I have configured the i.MX6UL memory controller for using two chip selects and assigned 512MiB to each. Although the RAM seems to work fine I'm experiencing extremely slow performance compared to a similar 1GiB chip with only one die (one chip select).
Testing one mtest loop over the first 496MiB takes: - 5s on the single die chip - 1m 16s on the dual die chip
I have run different memory benchmark tools in Linux like https://github.com/bingmann/pmbw.git and both memories perform similarly, but for some reason I see this weird behavior in U-Boot (v2015.04) with 'mtest'. The CONFIG_SYS_MEMTEST_START and CONFIG_SYS_MEMTEST_END are defined within secure limits and 'mtest' is not failing... it's just very slow.
Am I missing something obvious? Thanks -- Héctor Palacios