David Jander wrote:
Ok, I guess I was pessimistic. There is a weird bug in mxc_spi.c: CPOL is negated! I just saw that in the mx51evk.h header file CONFIG_FSL_PMIC_MODE was set to low-active clock (CPOL=1), which is not supposed to work. But it did work, and on the scope clock-polarity was active-high.
Ok
In spi_cfg(), I saw this line:
if (!(mode & SPI_CPOL)) sclkpol = 1;
AFAIK, this should be:
if (mode & SPI_CPOL) sclkpol = 1;
At least for the MX51. Can you confirm that this is different on the MX31?
Agree. According to the MX51 Manual, the register must be set with: 0 Active high polarity (0 = Idle). 1 Active low polarity (1 = Idle).
So we need to change both CONFIG_FSL_PMIC_MODE in config and in mxc_spi.c. Do you send a patch or do you prefer I will do this job ? I will add your signed-off-by if you agree.
Best regards, Stefano Babic