13 Jun
2013
13 Jun
'13
12:35 a.m.
On Tue, Jun 11, 2013 at 12:23 PM, Jagannadha Sutradharudu Teki < jagannadha.sutradharudu-teki@xilinx.com> wrote:
Updated the spi_flash framework to handle all sizes of flashes using bank/extd addr reg facility
The current implementation in spi_flash supports 3-byte address mode due to this up to 16Mbytes amount of flash is able to access for those flashes which has an actual size of > 16MB.
As most of the flashes introduces a bank/extd address registers for accessing the flashes in 16Mbytes of banks if the flash size is > 16Mbytes, this new scheme will add the bank selection feature for performing write/erase operations on all flashes.
Signed-off-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com
Reviewed-by: Simon Glass sjg@chromium.org