First supported chip is hi3798mv200 (which is similar to Hi3798cv200 used by poplar).
Signed-off-by: Yang Xiwen forbidden405@outlook.com --- MAINTAINERS | 1 + arch/arm/Kconfig | 12 ++++++++++++ arch/arm/Makefile | 1 + arch/arm/mach-histb/Kconfig | 14 ++++++++++++++ arch/arm/mach-histb/Makefile | 4 ++++ arch/arm/mach-histb/board_common.c | 31 ++++++++++++++++++++++++++++++ arch/arm/mach-histb/sysmap-histb.c | 31 ++++++++++++++++++++++++++++++ 7 files changed, 94 insertions(+) create mode 100644 arch/arm/mach-histb/Kconfig create mode 100644 arch/arm/mach-histb/Makefile create mode 100644 arch/arm/mach-histb/board_common.c create mode 100644 arch/arm/mach-histb/sysmap-histb.c
diff --git a/MAINTAINERS b/MAINTAINERS index 91d40ea4b6..ea7bf5e04c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -291,6 +291,7 @@ S: Maintained F: arch/arm/cpu/armv8/hisilicon F: arch/arm/include/asm/arch-hi6220/ F: arch/arm/include/asm/arch-hi3660/ +F: arch/arm/mach-histb
ARM HPE GXP ARCHITECTURE M: Jean-Marie Verdun verdun@hpe.com diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8a1e223422..a80322a48a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -578,6 +578,16 @@ config ARCH_DAVINCI help Support for TI's DaVinci platform.
+config ARCH_HISTB + bool "Hisilicon HiSTB SoCs" + select DM + select DM_SERIAL + select OF_CONTROL + select PL01X_SERIAL + imply CMD_DM + help + Support for HiSTB SoCs. + config ARCH_KIRKWOOD bool "Marvell Kirkwood" select ARCH_MISC_INIT @@ -2156,6 +2166,8 @@ source "arch/arm/mach-hpe/gxp/Kconfig"
source "arch/arm/mach-highbank/Kconfig"
+source "arch/arm/mach-histb/Kconfig" + source "arch/arm/mach-integrator/Kconfig"
source "arch/arm/mach-ipq40xx/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ac602aed9c..5ebe0619d3 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -61,6 +61,7 @@ machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_EXYNOS) += exynos machine-$(CONFIG_ARCH_GXP) += hpe machine-$(CONFIG_ARCH_HIGHBANK) += highbank +machine-$(CONFIG_ARCH_HISTB) += histb machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx machine-$(CONFIG_ARCH_K3) += k3 machine-$(CONFIG_ARCH_KEYSTONE) += keystone diff --git a/arch/arm/mach-histb/Kconfig b/arch/arm/mach-histb/Kconfig new file mode 100644 index 0000000000..78d40859a3 --- /dev/null +++ b/arch/arm/mach-histb/Kconfig @@ -0,0 +1,14 @@ +if ARCH_HISTB + +choice + prompt "Select a HiSTB SoC" + +config ARCH_HI3798MV2X + bool "Hi3798M V2XX series SoC" + select ARM64 + help + Support for Hi3798MV2XX series SoCs. + +endchoice + +endif diff --git a/arch/arm/mach-histb/Makefile b/arch/arm/mach-histb/Makefile new file mode 100644 index 0000000000..7975c0f2a0 --- /dev/null +++ b/arch/arm/mach-histb/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += sysmap-histb.o +obj-y += board_common.o diff --git a/arch/arm/mach-histb/board_common.c b/arch/arm/mach-histb/board_common.c new file mode 100644 index 0000000000..a26c2066e0 --- /dev/null +++ b/arch/arm/mach-histb/board_common.c @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Board init file for all histb boards + * + * (C) Copyright 2023 Yang Xiwen forbidden405@outlook.com + */ + +#include <common.h> +#include <fdtdec.h> +#include <init.h> +#include <asm/system.h> + +int __weak board_init(void) +{ + return 0; +} + +int __weak dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} + +int __weak dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +void __weak reset_cpu(void) +{ + psci_system_reset(); +} diff --git a/arch/arm/mach-histb/sysmap-histb.c b/arch/arm/mach-histb/sysmap-histb.c new file mode 100644 index 0000000000..83a2bb9417 --- /dev/null +++ b/arch/arm/mach-histb/sysmap-histb.c @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Hisilicon HiSTB memory map + * + * (C) Copyright 2023 Yang Xiwen forbidden405@outlook.com + */ + +#include <common.h> +#include <asm/armv8/mmu.h> + +static struct mm_region histb_mem_map[] = { + { + .virt = 0x0UL, /* DRAM */ + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x80000000UL, /* Peripheral block */ + .phys = 0x80000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* Terminator */ + 0, + } +}; + +struct mm_region *mem_map = histb_mem_map;