20 Aug
2014
20 Aug
'14
8:12 p.m.
On 08/18/2014 01:16 AM, Thierry Reding wrote:
From: Thierry Reding treding@nvidia.com
This function is required by PCIe and SATA. This patch implements it on Tegra20, Tegra30 and Tegra124. It isn't implemented for Tegra114 because it doesn't support PCIe or SATA.
I see no issue with the structure of the code so, Acked-by: Stephen Warren swarren@nvidia.com
I know too little about the CAR/PLLE to comment on the actual register IO performed here; someone like Peter De Schrijver should review this really...