
Thompson, Nick (GE EntSol, Intelligent Platforms) wrote:
Create initial contents of the cpu/arm926ejs/da8xx directory:
Low level initilisation. Support for SoC clock, timer and reset functions.
Signed-off-by: Nick Thompson nick.thompson@gefanuc.com
Applies to u-boot-ti
cpu/arm926ejs/da8xx/Makefile | 53 +++++++++++++ cpu/arm926ejs/da8xx/clock.c | 58 ++++++++++++++ cpu/arm926ejs/da8xx/lowlevel_init.S | 73 +++++++++++++++++ cpu/arm926ejs/da8xx/reset.S | 77 ++++++++++++++++++ cpu/arm926ejs/da8xx/timer.c | 148 +++++++++++++++++++++++++++++++++++ 5 files changed, 409 insertions(+), 0 deletions(-)
diff --git a/cpu/arm926ejs/da8xx/Makefile b/cpu/arm926ejs/da8xx/Makefile new file mode 100644 index 0000000..76fb7b8 --- /dev/null +++ b/cpu/arm926ejs/da8xx/Makefile @@ -0,0 +1,53 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn ksi@koi8.net +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(SOC).a
+COBJS = timer.o clock.o +SOBJS = reset.o
+ifndef CONFIG_SKIP_LOWLEVEL_INIT +SOBJS += lowlevel_init.o +endif
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START))
+all: $(obj).depend $(LIB)
+$(LIB): $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
+####################################################################### ##
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+####################################################################### ## diff --git a/cpu/arm926ejs/da8xx/clock.c b/cpu/arm926ejs/da8xx/clock.c new file mode 100644 index 0000000..25cf4df --- /dev/null +++ b/cpu/arm926ejs/da8xx/clock.c @@ -0,0 +1,58 @@ +/*
- Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc.
Extra space here
- DA8xx clock module
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
This has an extra space for the last 3 lines
Line wrapping. You can figure out where the rest of these are.
- */
+#include <common.h> +#include <asm/arch/hardware.h>
+dv_reg_p sysdiv[9] = {
- REG_P(PLL0_DIV1), REG_P(PLL0_DIV2), REG_P(PLL0_DIV3),
REG_P(PLL0_DIV4),
- REG_P(PLL0_DIV5), REG_P(PLL0_DIV6), REG_P(PLL0_DIV7),
REG_P(PLL0_DIV8),
- REG_P(PLL0_DIV9) };
+int clk_get(unsigned int id) +{
- int pre_div = (REG(PLL0_PREDIV) & 0xff) + 1;
- int pllm = REG(PLL0_PLLM) + 1;
There is a extra space before the ' +'
- int post_div = (REG(PLL0_POSTDIV) & 0xff) + 1;
- int pll_out = CONFIG_SYS_OSCIN_FREQ;
Please use tabs.
- if(id == DAVINCI_AUXCLK_CLKID)
Trailing space
goto out;
Convert to tables
- /* Lets keep this simple. Combining operations can result in
* unexpected approximations
*/
Tabs For multi-line comments, use /* * My comments ln0 * My comments ln1 */
- pll_out /= pre_div;
- pll_out *= pllm;
- if(id == DAVINCI_PLLM_CLKID)
Trailing whitespace
goto out;
Tabs
Trailing whitespace I am not going to comment of trailing whitespace or tabs anymore Please fix these generally
- pll_out /= post_div;
- if(id == DAVINCI_PLLC_CLKID)
Space between 'if('
goto out;
- pll_out /= (REG(sysdiv[id - 1]) & 0xff) + 1;
+out:
- return pll_out;
+} diff --git a/cpu/arm926ejs/da8xx/lowlevel_init.S b/cpu/arm926ejs/da8xx/lowlevel_init.S new file mode 100644 index 0000000..53f801a --- /dev/null +++ b/cpu/arm926ejs/da8xx/lowlevel_init.S @@ -0,0 +1,73 @@ +/*
- Low-level board setup code for TI DA8xx SoC based boards.
- Copyright (C) 2008 Texas Instruments, Inc <www.ti.com>
- Sekhar Nori nsekhar@ti.com
- Based on TI DaVinci low level init code. Original copyrights follow.
- Copyright (C) 2007 Sergey Kubushyn ksi@koi8.net
- Partially based on TI sources, original copyrights follow:
- */
Combine comment
+/*
- Board specific setup info
- (C) Copyright 2003
- Texas Instruments, <www.ti.com>
- Kshitij Gupta Kshitij@ti.com
- Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
- Modified for OMAP 5912 OSK board by Rishi Bhattacharya, Apr 2004
- See file CREDITS for list of people who contributed to this
- project.
- Modified for DV-EVM board by Rishi Bhattacharya, Apr 2005
- See file CREDITS for list of people who contributed to this
- project.
- Modified for DV-EVM board by Swaminathan S, Nov 2005
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <config.h> +#include <asm/arch/hardware.h>
+.globl lowlevel_init +lowlevel_init:
- /*
* Call board-specific lowlevel init.
* That MUST be present and THAT returns
* back to arch calling code with "mov pc, lr."
*/
- b dv_board_init
- nop
+.ltorg
+INTC_GLB_EN_ADDR:
- .word INTC_GLB_EN
+INTC_EN_CLR0_ADDR:
- .word INTC_EN_CLR0
+INTC_HINT_EN_ADDR:
- .word INTC_HINT_EN
diff --git a/cpu/arm926ejs/da8xx/reset.S b/cpu/arm926ejs/da8xx/reset.S new file mode 100644 index 0000000..a687d44 --- /dev/null +++ b/cpu/arm926ejs/da8xx/reset.S @@ -0,0 +1,77 @@ +/*
- Processor reset using WDT for TI TMS320DM644x SoC.
- Copyright (C) 2007 Sergey Kubushyn ksi@koi8.net
Can this line be removed ?
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+.globl reset_cpu +reset_cpu:
- ldr r0, WDT_TGCR
- mov r1, $0x08
- str r1, [r0]
- ldr r1, [r0]
- orr r1, r1, $0x03
- str r1, [r0]
- mov r1, $0
- ldr r0, WDT_TIM12
- str r1, [r0]
- ldr r0, WDT_TIM34
- str r1, [r0]
- ldr r0, WDT_PRD12
- str r1, [r0]
- ldr r0, WDT_PRD34
- str r1, [r0]
- ldr r0, WDT_TCR
- ldr r1, [r0]
- orr r1, r1, $0x40
- str r1, [r0]
- ldr r0, WDT_WDTCR
- ldr r1, [r0]
- orr r1, r1, $0x4000
- str r1, [r0]
- ldr r1, WDTCR_VAL1
- str r1, [r0]
- ldr r1, WDTCR_VAL2
- str r1, [r0]
- nop
- nop
- nop
- nop
+reset_cpu_loop:
- b reset_cpu_loop
+WDT_TGCR:
- .word 0x01c21c24
+WDT_TIM12:
- .word 0x01c21c10
+WDT_TIM34:
- .word 0x01c21c14
+WDT_PRD12:
- .word 0x01c21c18
+WDT_PRD34:
- .word 0x01c21c1c
+WDT_TCR:
- .word 0x01c21c20
+WDT_WDTCR:
- .word 0x01c21c28
+WDTCR_VAL1:
- .word 0xa5c64000
+WDTCR_VAL2:
- .word 0xda7e4000
diff --git a/cpu/arm926ejs/da8xx/timer.c b/cpu/arm926ejs/da8xx/timer.c new file mode 100644 index 0000000..728167a --- /dev/null +++ b/cpu/arm926ejs/da8xx/timer.c @@ -0,0 +1,148 @@ +/*
- (C) Copyright 2003
- Texas Instruments <www.ti.com>
- (C) Copyright 2002
- Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- Marius Groeger mgroeger@sysgo.de
- (C) Copyright 2002
- Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- Alex Zuepke azu@sysgo.de
- (C) Copyright 2002-2004
- Gary Jennejohn, DENX Software Engineering, gj@denx.de
- (C) Copyright 2004
- Philippe Robin, ARM Ltd. philippe.robin@arm.com
- Copyright (C) 2007 Sergey Kubushyn ksi@koi8.net
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +/* #include <arm926ejs.h> */
+typedef volatile struct {
I do not think the volatile is needed.
- u_int32_t pid12;
- u_int32_t emumgt;
- u_int32_t na1;
- u_int32_t na2;
- u_int32_t tim12;
- u_int32_t tim34;
- u_int32_t prd12;
- u_int32_t prd34;
- u_int32_t tcr;
- u_int32_t tgcr;
- u_int32_t wdtcr;
+} davinci_timer;
+davinci_timer *timer = (davinci_timer *)CONFIG_SYS_TIMERBASE;
+#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) +#define TIM_CLK_DIV 16
+static ulong timestamp; +static ulong lastinc;
+int timer_init(void) +{
- /* We are using timer34 in unchained 32-bit mode, full speed */
- timer->tcr = 0x0;
- timer->tgcr = 0x0;
- timer->tgcr = 0x06 | ((TIM_CLK_DIV - 1) << 8);
- timer->tim34 = 0x0;
- timer->prd34 = TIMER_LOAD_VAL;
- lastinc = 0;
- timestamp = 0;
- timer->tcr = 2 << 22;
Convert writes to writel's or whatever is the appropriate data type.
- return(0);
+}
+void reset_timer(void) +{
- timer->tcr = 0x0;
- timer->tim34 = 0;
- lastinc = 0;
- timestamp = 0;
- timer->tcr = 2 << 22;
+}
+static ulong get_timer_raw(void) +{
- ulong now = timer->tim34;
- if (now >= lastinc) {
/* normal mode */
timestamp += now - lastinc;
- } else {
/* overflow ... */
timestamp += now + TIMER_LOAD_VAL - lastinc;
- }
- lastinc = now;
- return timestamp;
+}
+ulong get_timer(ulong base) +{
- return((get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) -
base); +}
+void set_timer(ulong t) +{
- timestamp = t;
+}
+void udelay(unsigned long usec) +{
- ulong tmo;
- ulong endtime;
- signed long diff;
- tmo = CONFIG_SYS_HZ_CLOCK / 1000;
- tmo *= usec;
- tmo /= (1000 * TIM_CLK_DIV);
- endtime = get_timer_raw() + tmo;
- do {
ulong now = get_timer_raw();
diff = endtime - now;
- } while (diff >= 0);
+}
+/*
- This function is derived from PowerPC code (read timebase as long
long).
- On ARM it just returns the timer value.
- */
+unsigned long long get_ticks(void) +{
- return(get_timer(0));
+}
+/*
- This function is derived from PowerPC code (timebase clock
frequency).
- On ARM it returns the number of timer ticks per second.
- */
+ulong get_tbclk(void) +{
- return CONFIG_SYS_HZ;
+} _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot