This patch decreases the code size of the nand_spl by turning multiple function pointer dereferences in a single function into a single local function pointer.
Signed-off-by: Alex Waterman awaterman@dawning.com Cc: Scott Wood scottwood@freescale.com Cc: Stefan Roese sr@denx.de --- This works on my local board but I haven't tested it on anything else since I do not have access to any other hardware. I did make sure the canyonlands board still builds.
nand_spl/nand_boot.c | 50 ++++++++++++++++++++++++++++---------------------- 1 files changed, 28 insertions(+), 22 deletions(-)
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 4a96878..dd7f3b2 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -35,34 +35,37 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 { struct nand_chip *this = mtd->priv; int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; + void (*cmd_ctrl)(struct mtd_info *mtd, int cmd, + unsigned int ctrl) = this->cmd_ctrl; + int (*dev_ready)(struct mtd_info *mtd) = this->dev_ready;
- if (this->dev_ready) - while (!this->dev_ready(mtd)) + if (dev_ready != NULL) + while (!dev_ready(mtd)) ; else CONFIG_SYS_NAND_READ_DELAY;
/* Begin command latch cycle */ - this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); /* Set ALE and clear CLE to start address cycle */ /* Column address */ - this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); - this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ - this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, + cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ + cmd_ctrl(mtd, (page_addr >> 8) & 0xff, NAND_CTRL_ALE); /* A[24:17] */ #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE /* One more address cycle for devices > 32MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, + cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[28:25] */ #endif /* Latch in address */ - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
/* * Wait a while for the data to be ready */ - if (this->dev_ready) - while (!this->dev_ready(mtd)) + if (dev_ready != NULL) + while (!dev_ready(mtd)) ; else CONFIG_SYS_NAND_READ_DELAY; @@ -77,9 +80,12 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 { struct nand_chip *this = mtd->priv; int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; + void (*cmd_ctrl)(struct mtd_info *mtd, int cmd, + unsigned int ctrl) = this->cmd_ctrl; + int (*dev_ready)(struct mtd_info *mtd) = this->dev_ready;
- if (this->dev_ready) - while (!this->dev_ready(mtd)) + if (dev_ready != NULL) + while (!dev_ready(mtd)) ; else CONFIG_SYS_NAND_READ_DELAY; @@ -95,31 +101,31 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 offs >>= 1;
/* Begin command latch cycle */ - this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); /* Set ALE and clear CLE to start address cycle */ /* Column address */ - this->cmd_ctrl(mtd, offs & 0xff, + cmd_ctrl(mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ - this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ + cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ /* Row address */ - this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ - this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), + cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ + cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), NAND_CTRL_ALE); /* A[27:20] */ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE /* One more address cycle for devices > 128MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, + cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[31:28] */ #endif /* Latch in address */ - this->cmd_ctrl(mtd, NAND_CMD_READSTART, + cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE); - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
/* * Wait a while for the data to be ready */ - if (this->dev_ready) - while (!this->dev_ready(mtd)) + if (dev_ready != NULL) + while (!dev_ready(mtd)) ; else CONFIG_SYS_NAND_READ_DELAY;