Hi Tim,
On 02.02.19 03:32, Tim Harvey wrote:
Stefan,
I'm trying to track down an IMX6 SPL NAND boot regression that started in v2018.07 with your patch series to mxs_nand.
I am sorry about that. Unfortunately I did not had a design at hand where I was able to test the NAND driver in SPL...
I bisected it back to '5346c31e305a37d39f535cc0d5ae87d8b7e81230 mtd: nand: mxs_nand: use self init'. With this particular patch nand bbt scanning would crash the board because of nand_chip.scan_btt not being assigned. This was later fixed in '96d0be07e7498e7174daa6f3b56fc807b9feb71d MTD: nand: mxs_nand_spl: Fix empty function pointer for BBT' but cherry-picking that on top of 5346c31 fixes the immediate crash while scanning but then I find that mxs_read_page_ecc() hangs on the 4th page of reading u-boot.img from the NAND. This gets worse 2 patches later where in '28897e8d21f8e197e259a91c693de09cd81f2d5a: mtd: nand: mxs_nand: use structure for BCH geometry' I find that the first byte of every page read is wrong because mxs_nand_swap_block_mark() is getting called on the page which swaps the first bytes with oob.
There are several IMX6 boards out there using both NAND and SPL I believe that I would assume were broken by this series. Any ideas on the proper resolution?
Adam Ford sent another patch just recently with the title: "MTD: nand: mxs_nand: Allow driver to auto setup ECC in SPL". Maybe this helps?
-- Stefan
Regards,
Tim