On Mon, Oct 19, 2015 at 9:51 AM, Simon Glass sjg@chromium.org wrote:
Add support for the debug UART on link. This is useful for early debugging.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2: None
arch/x86/cpu/ivybridge/cpu.c | 7 +++++++ configs/chromebook_link_defconfig | 4 ++++ 2 files changed, 11 insertions(+)
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index cce5923..0e6512c 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -340,3 +340,10 @@ int print_cpuinfo(void)
return 0;}
+void board_debug_uart_init(void) +{
/* This enables the debug UART */pci_x86_write_config(NULL, PCH_LPC_DEV, LPC_EN, COMA_LPC_EN,PCI_SIZE_16);+} diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index fbecf8b..78a9470 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -22,6 +22,10 @@ CONFIG_CROS_EC_LPC=y CONFIG_SPI_FLASH=y CONFIG_DM_PCI=y CONFIG_DM_RTC=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DM_TPM=y CONFIG_TPM_TIS_LPC=y CONFIG_VIDEO_VESA=y --
Reviewed-by: Bin Meng bmeng.cn@gmail.com