On 2 August 2017 at 14:34, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
The RK3368 GRF header was still defines with a shifted-mask but with non-shifted function selectors for the IOMUX defines. As the RK3368 support is still fresh enough to allow a quick change, we do this now before having more code use this.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4:
- restore the symbolic constant for the shift-values in the IOMUX enums
Changes in v3: None Changes in v2:
- dropped the RK3368_ prefix for the GRF constants
arch/arm/include/asm/arch-rockchip/grf_rk3368.h | 413 ++++++++++++++---------- drivers/pinctrl/rockchip/pinctrl_rk3368.c | 9 +- 2 files changed, 242 insertions(+), 180 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
See nit below
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h index a438f5d..3b3a3ef 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h @@ -1,4 +1,6 @@ -/* (C) Copyright 2016 Rockchip Electronics Co., Ltd +/*
- (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
- (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- SPDX-License-Identifier: GPL-2.0+
@@ -100,315 +102,378 @@ check_member(rk3368_pmu_grf, os_reg[0], 0x200);
/*GRF_GPIO0C_IOMUX*/ enum {
GPIO0C7_SHIFT = 14,GPIO0C7_MASK = 3 << GPIO0C7_SHIFT,GPIO0C7_GPIO = 0,GPIO0C7_LCDC_D19,GPIO0C7_TRACE_D9,GPIO0C7_UART1_RTSN,
GPIO0C7_SHIFT = 14,GPIO0C7_MASK = GENMASK(GPIO0C7_SHIFT + 1, GPIO0C7_SHIFT),GPIO0C7_GPIO = 0,GPIO0C7_LCDC_D19 = (1 << GPIO0C7_SHIFT),
You don't need the () on these.
Regards, Simon