
22 Jul
2006
22 Jul
'06
8:44 p.m.
Dear Masami,
in message 42E9F2D7.1010708@sonare.it you wrote:
I have the same problem on dbau1500 evaluation board. The following patch may improve little:-)
...
diff -ur u-boot-050729/cpu/mips/au1x00_eth.c u-boot-050729-test/cpu/mips/au1x00_eth.c --- u-boot-050729/cpu/mips/au1x00_eth.c 2005-01-10 07:28:58.000000000 +0900 +++ u-boot-050729-test/cpu/mips/au1x00_eth.c 2005-07-29 18:08:39.000000000 +0900 @@ -172,9 +172,6 @@ (volatile mac_fifo_t*)(MAC0_RX_DMA_ADDR+MAC_RX_BUFF0_STATUS); int i;
next_tx = 0;
next_rx = 0;
/* We have to enable clocks before releasing reset */ *macen = MAC_EN_CLOCK_ENABLE; udelay(10);
@@ -233,6 +230,9 @@
eth_register(dev);
next_tx = 0;
next_rx = 0;
Do you think this patch (resp. an equivalent one - the code has changed since) is still required?
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
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