Dear Hui.Tang,
2009/11/18 Hui.Tang zetalabs@gmail.com:
This patch add a S3C2410-based ARM study platform GEC2410 support. Signed-off-by: Hui.Tang zetalabs@gmail.com
total: 0 errors, 0 warnings, 1302 lines checked
0001-ARM-Add-New-Board-GEC2410.patch has no obvious style problems and is ready for submission.
MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/gec/gec2410/Makefile | 54 ++++++ board/gec/gec2410/README | 85 +++++++++ board/gec/gec2410/config.mk | 32 ++++ board/gec/gec2410/gec2410.c | 306 +++++++++++++++++++++++++++++++++ board/gec/gec2410/gec2410_mem.h | 118 +++++++++++++ board/gec/gec2410/lowlevel_init.S | 93 ++++++++++ board/gec/gec2410/u-boot.lds | 61 +++++++ cpu/arm920t/s3c24x0/timer.c | 6 +- cpu/arm920t/start.S | 19 ++ include/configs/gec2410.h | 249 +++++++++++++++++++++++++++ nand_spl/board/gec/gec2410/Makefile | 105 +++++++++++ nand_spl/board/gec/gec2410/config.mk | 32 ++++ nand_spl/board/gec/gec2410/u-boot.lds | 60 +++++++ 16 files changed, 1225 insertions(+), 3 deletions(-) create mode 100644 board/gec/gec2410/Makefile create mode 100644 board/gec/gec2410/README create mode 100644 board/gec/gec2410/config.mk create mode 100644 board/gec/gec2410/gec2410.c create mode 100644 board/gec/gec2410/gec2410_mem.h create mode 100644 board/gec/gec2410/lowlevel_init.S create mode 100644 board/gec/gec2410/u-boot.lds create mode 100644 include/configs/gec2410.h create mode 100644 nand_spl/board/gec/gec2410/Makefile create mode 100644 nand_spl/board/gec/gec2410/config.mk create mode 100644 nand_spl/board/gec/gec2410/u-boot.lds
diff --git a/MAINTAINERS b/MAINTAINERS index d70a9d2..6ecba41 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -429,6 +429,10 @@ Timur Tabi timur@freescale.com MPC8349E-mITX MPC8349 MPC8349E-mITX-GP MPC8349
+Hui Tang zetalabs@gmail.com
- gec2410 ARM920T
Erik Theisen etheisen@mindspring.com
W7OLMC PPC4xx diff --git a/MAKEALL b/MAKEALL index d63c5c2..fffa58a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -548,6 +548,7 @@ LIST_ARM9=" \ cp926ejs \ cp946es \ cp966 \
- gec2410 \
imx27lite \ lpd7a400 \ mv88f6281gtw_ge \ diff --git a/Makefile b/Makefile index bcb3fe9..9979974 100644 --- a/Makefile +++ b/Makefile @@ -2951,6 +2951,9 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
+gec2410_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t gec2410 gec s3c24x0
imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
diff --git a/board/gec/gec2410/Makefile b/board/gec/gec2410/Makefile new file mode 100644 index 0000000..052f600 --- /dev/null +++ b/board/gec/gec2410/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2009 +# Hui Tang zetalabs@gmail.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(BOARD).a
+COBJS := gec2410.o +SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS))
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+clean:
- rm -f $(SOBJS) $(OBJS)
+distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/gec/gec2410/README b/board/gec/gec2410/README new file mode 100644 index 0000000..952aae8 --- /dev/null +++ b/board/gec/gec2410/README @@ -0,0 +1,85 @@ +U-Boot for GEC2410
+------------------------------------------------ +The supported features of the GEC2410 board are:
- CPU (Samsung S3C2410 SoC)
- SDRAM (64 MB , 2 pcs K4S561632, 32 bit)
- NAND FLASH (64MB , 1 pcs K9F1208)
- NOR FLASH (only on rev1.1 board, 2MB , 1 pcs SST39VF1601)
- ETHERNET (10M , 1 pcs CS8900)
+------------------------------------------------ +Memory Map from CPU point of view:
+for NAND FLASH boot:
- Start Size Access to
- -----------------------------------------------------
- 0x00000000 64MB NAND FLASH (first 4K SRAM for stepptingstone)
- 0x19000300 CS8900 I/O base
- 0x30000000 64MB SDRAM
- 0x48000000 128MB Special Function Registers Area
+for NOR FLASH boot:
- Start Size Access to
- -----------------------------------------------------
- 0x00000000 2MB NOR FLASH
- 0x19000300 CS8900 I/O base
- 0x30000000 64MB SDRAM
- 0x40000000 4KB BootSRAM
- 0x48000000 128MB Special Function Registers Area
+------------------------------------------------ +Setting the board Jumpers & Switches:
- In order to get the board running with the default configuration the
- jumpers need to be set as follows:
- Core board Jumpers:
- JP1 close (Set boot mode, close for booting from NAND FLASH,
- otherwise from NOR FLASH)
- Main board Jumpers:
- J1 close (Set beep, close for enabling beep, or disabling beep)
- J18 1-2 (1-2 set RXD2 as UART; 2-3 set RXD2 as IrDA)
- J9,J10 2-3 (1-2 set USB HOST 1 to Host mode;
- 2-3 set USB HOST 1 to Device mode)
- J13 1-2 (1-2 set LCD working power to 5V;
- 2-3 set LCD working power to 3.3V)
- Core board Switches:
- S1 open (Reset button)
- Main board Switches:
- K1~K16 open (4x4 keyboard)
+------------------------------------------------ +LED & Connector Interfaces:
- Core board LEDs:
- D1,D2 I/O port
- D3 PWREN pin LED
- D4 Core board power
- Main board LEDs:
- D1~D4 GPIO
- D5,D6 Ethernet
- D11 Main board power
- Core board Connector Interfaces:
- J1 JTAG (20 pins)
- Main board Connector Interfaces:
- RJ1 Ethernet (RJ45)
- J2 Audio In
- J3 Audio Out
- J4 Serial Port 1
- J5 Serial Port 2
- U4 IrDA Port
- J7 USB HOST 0
- J9 USB HOST 1 / USB DEVICE
- J11 USB DEVICE
- J20 GPIO Pins
diff --git a/board/gec/gec2410/config.mk b/board/gec/gec2410/config.mk new file mode 100644 index 0000000..104fa39 --- /dev/null +++ b/board/gec/gec2410/config.mk @@ -0,0 +1,32 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, garyj@denx.de +# David Mueller, ELSOFT AG, d.mueller@elsoft.ch +# +# GuangDong Embedded Software Center GEC2410 board with S3C2410X (ARM920T) cpu +# +# see http://www.gd-emb.com/sales_detail/menu-2410.html for more information on GEC2410 +#
+# +# GEC2410 has 1 bank of 64 MB DRAM +# +# 3000'0000 to 3400'0000 +# +# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 +# optionally with a ramdisk at 3080'0000 +# +# we load ourself to 33e0'0000 +# +# download area is 3300'c000 +#
+ifndef TEXT_BASE +TEXT_BASE = 0x33e00000 +endif
+CONFIG_NAND_U_BOOT = y
+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/gec/gec2410 diff --git a/board/gec/gec2410/gec2410.c b/board/gec/gec2410/gec2410.c new file mode 100644 index 0000000..97e5c57 --- /dev/null +++ b/board/gec/gec2410/gec2410.c @@ -0,0 +1,306 @@ +/*
- (C) Copyright 2002
- Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- Marius Groeger mgroeger@sysgo.de
- (C) Copyright 2002
- David Mueller, ELSOFT AG, d.mueller@elsoft.ch
- (C) Copyright 2009
- Hui Tang, zetalabs@gmail.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <netdev.h> +#include <s3c2410.h> +#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define FCLK_SPEED 1
+#if FCLK_SPEED == 0 /* Fout = 203MHz, Fin = 12MHz for Audio */ +#define M_MDIV 0xC3 +#define M_PDIV 0x4 +#define M_SDIV 0x1 +#elif FCLK_SPEED == 1 /* Fout = 202.8MHz */ +#define M_MDIV 0xA1 +#define M_PDIV 0x3 +#define M_SDIV 0x1 +#endif
+#define USB_CLOCK 1
+#if USB_CLOCK == 0 +#define U_M_MDIV 0xA1 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x1 +#elif USB_CLOCK == 1 +#define U_M_MDIV 0x48 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x2 +#endif
+/*
- Miscellaneous platform dependent initialisations
- */
+int board_init(void) +{
- struct s3c24x0_clock_power * const clk_power =
- s3c24x0_get_base_clock_power();
- struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
- /* to reduce PLL lock time, adjust the LOCKTIME register */
- writel(0xFFFFFF, &clk_power->LOCKTIME);
- /* configure MPLL */
- writel(((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV), &clk_power->MPLLCON);
- /* some delay between MPLL and UPLL */
- udelay(4000);
- /* configure UPLL */
- writel(((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV),
- &clk_power->UPLLCON);
- /* some delay between MPLL and UPLL */
- udelay(8000);
- /* set up the I/O ports */
- /* configure GPA port */
- /*====================================*
- * PIN FUNCTION VALUE *
- *====================================*
- * GPA22 nFCE 1
- * GPA21 nRSTOUT 1
- * GPA20 nFRE 1
- * GPA19 nFWE 1
- * GPA18 ALE 1
- * GPA17 CLE 1
- * GPA16 nGCS5 1
- * GPA15 nGCS4 1
- * GPA14 nGCS3 1
- * GPA13 nGCS2 1
- * GPA12 nGCS1 1
- * GPA11 ADDR26 1
- * GPA10 ADDR25 1
- * GPA9 ADDR24 1
- * GPA8 ADDR23 1
- * GPA7 ADDR22 1
- * GPA6 ADDR21 1
- * GPA5 ADDR20 1
- * GPA4 ADDR19 1
- * GPA3 ADDR18 1
- * GPA2 ADDR17 1
- * GPA1 ADDR16 1
- * GPA0 ADDR0 1
- *====================================*/
- writel(0x007FFFFF, &gpio->GPACON);
- /* configure GPB port */
- /*====================================*
- * PIN FUNCTION VALUE *
- *====================================*
- * GPB10 Input 00
- * GPB9 Output 01
- * GPB8 Input 00
- * GPB7 Output 01
- * GPB6 Input 00
- * GPB5 Output 01
- * GPB4 Output 01
- * GPB3 Output 01
- * GPB2 Output 01
- * GPB1 Output 01
- * GPB0 Output 01
- *====================================*/
- writel(0x00044555, &gpio->GPBCON);
- /* disable all pull-up register */
- writel(0x000007FF, &gpio->GPBUP);
- /* configure GPC port */
- /*====================================*
- * PIN FUNCTION VALUE *
- *====================================*
- * GPC15 VD7 10
- * GPC14 VD6 10
- * GPC13 VD5 10
- * GPC12 VD4 10
- * GPC11 VD3 10
- * GPC10 VD2 10
- * GPC9 VD1 10
- * GPC8 VD0 10
- * GPC7 LCDVF2 10
- * GPC6 LCDVF1 10
- * GPC5 LCDVF0 10
- * GPC4 VM 10
- * GPC3 VFRAME 10
- * GPC2 VLINE 10
- * GPC1 VCLK 10
- * GPC0 LEND 10
- *====================================*/
- writel(0xAAAAAAAA, &gpio->GPCCON);
- /* disable all pull-up register */
- writel(0x0000FFFF, &gpio->GPCUP);
- /* configure GPD port */
- /*====================================*
- * PIN FUNCTION VALUE *
- *====================================*
- * GPD15 VD23 10
- * GPD14 VD22 10
- * GPD13 VD21 10
- * GPD12 VD20 10
- * GPD11 VD19 10
- * GPD10 VD18 10
- * GPD9 VD17 10
- * GPD8 VD16 10
- * GPD7 VD15 10
- * GPD6 VD14 10
- * GPD5 VD13 10
- * GPD4 VD12 10
- * GPD3 VD11 10
- * GPD2 VD10 10
- * GPD1 VD9 10
- * GPD0 VD8 10
- *====================================*/
- writel(0xAAAAAAAA, &gpio->GPDCON);
- /* disable all pull-up register */
- writel(0x0000FFFF, &gpio->GPDUP);
- /* configure GPE port */
- /*====================================*
- * PIN FUNCTION VALUE *
- *====================================*
- * GPE15 IICSDA 10
- * GPE14 IICSCL 10
- * GPE13 SPICLK0 10
- * GPE12 SPIMOSIO 10
- * GPE11 SPIMISOO 10
- * GPE10 SDDAT3 10
- * GPE9 SDDAT2 10
- * GPE8 SDDAT1 10
- * GPE7 SDDAT0 10
- * GPE6 SDCMD 10
- * GPE5 SDCLK 10
- * GPE4 I2SSDO 10
- * GPE3 I2SSDI 10
- * GPE2 CDCLK 10
- * GPE1 I2SSCLK 10
- * GPE0 I2SLRCK 10
- *====================================*/
- writel(0xAAAAAAAA, &gpio->GPECON);
- /* disable all pull-up register */
- writel(0x0000FFFF, &gpio->GPEUP);
- /* configure GPF port */
- /*====================================*
- * PIN FUNCTION VALUE *
- *====================================*
- * GPF7 Output 01
- * GPF6 Output 01
- * GPF5 Output 01
- * GPF4 Output 01
- * GPF3 EINT3 10
- * GPF2 EINT2 10
- * GPF1 EINT1 10
- * GPF0 EINT0 10
- *====================================*/
- writel(0x000055AA, &gpio->GPFCON);
- /* disable all pull-up register */
- writel(0x000000FF, &gpio->GPFUP);
- /* configure GPG port */
- /*====================================*
- * PIN FUNCTION VALUE *
- *====================================*
- * GPG15 nYPON 11
- * GPG14 YMON 11
- * GPG13 nXPON 11
- * GPG12 XMON 11
- * GPG11 EINT19 10
- * GPG10 Output 01
- * GPG9 Output 01
- * GPG8 Output 01
- * GPG7 SPICLK1 11
- * GPG6 SPIMOSI1 11
- * GPG5 SPIMISO1 11
- * GPG4 LCD_PWREN 11
- * GPG3 EINT11 10
- * GPG2 nSS0 11
- * GPG1 EINT9 10
- * GPG0 EINT8 10
- *====================================*/
- writel(0xFF95FFBA, &gpio->GPGCON);
- /* disable all pull-up register */
- writel(0x0000FFFF, &gpio->GPGUP);
- /* configure GPH port */
- /*====================================*
- * PIN FUNCTION VALUE *
- *====================================*
- * GPH10 CLKOUT1 10
- * GPH9 CLKOUT0 10
- * GPH8 UEXTCLK 10
- * GPH7 nCTS1 11
- * GPH6 nRTS1 11
- * GPH5 RXD1 10
- * GPH4 TXD1 10
- * GPH3 RXD0 10
- * GPH2 TXD0 10
- * GPH1 nRTS0 10
- * GPH0 nCTS0 10
- *====================================*/
- writel(0x002AFAAA, &gpio->GPHCON);
- /* disable all pull-up register */
- writel(0x000007FF, &gpio->GPHUP);
- /* arch number of GEC2410-Board */
- gd->bd->bi_arch_number = MACH_TYPE_GEC2410;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
- icache_enable();
- dcache_enable();
- return 0;
+}
+int dram_init(void) +{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
- PHYS_SDRAM_1_SIZE);
- return 0;
+}
+#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{
- int rc = 0;
+#ifdef CONFIG_CS8900
- rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
+#endif
- return rc;
+} +#endif diff --git a/board/gec/gec2410/gec2410_mem.h b/board/gec/gec2410/gec2410_mem.h new file mode 100644 index 0000000..93f820b --- /dev/null +++ b/board/gec/gec2410/gec2410_mem.h @@ -0,0 +1,118 @@ +/*
- Memory Setup stuff - taken from blob memsetup.S
- Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
- Copyright (C) 2002 Samsung Electronics SW.LEE hitchcar@sec.samsung.com
- Modified for the Samsung SMDK2410 by
- (C) Copyright 2002
- David Mueller, ELSOFT AG, d.mueller@elsoft.ch
- Copyright (C) 2009 Hui Tang zetalabs@gmail.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#define BWSCON 0x48000000
+/* BWSCON */ +#define DW8 (0x0) +#define DW16 (0x1) +#define DW32 (0x2) +#define WAIT (0x1<<2) +#define UBLB (0x1<<3)
+#define B1_BWSCON (DW32) +#define B2_BWSCON (DW16) +#define B3_BWSCON (DW16 + WAIT + UBLB) +#define B4_BWSCON (DW16) +#define B5_BWSCON (DW16) +#define B6_BWSCON (DW32) +#define B7_BWSCON (DW32)
+/* BANK0CON */ +#define B0_Tacs 0x0 /* 0clk */ +#define B0_Tcos 0x0 /* 0clk */ +#define B0_Tacc 0x7 /* 14clk */ +#define B0_Tcoh 0x0 /* 0clk */ +#define B0_Tah 0x0 /* 0clk */ +#define B0_Tacp 0x0 +#define B0_PMC 0x0 /* normal */
+/* BANK1CON */ +#define B1_Tacs 0x0 /* 0clk */ +#define B1_Tcos 0x0 /* 0clk */ +#define B1_Tacc 0x7 /* 14clk */ +#define B1_Tcoh 0x0 /* 0clk */ +#define B1_Tah 0x0 /* 0clk */ +#define B1_Tacp 0x0 +#define B1_PMC 0x0
+#define B2_Tacs 0x0 +#define B2_Tcos 0x0 +#define B2_Tacc 0x7 +#define B2_Tcoh 0x0 +#define B2_Tah 0x0 +#define B2_Tacp 0x0 +#define B2_PMC 0x0
+#define B3_Tacs 0x0 /* 0clk */ +#define B3_Tcos 0x3 /* 4clk */ +#define B3_Tacc 0x7 /* 14clk */ +#define B3_Tcoh 0x1 /* 1clk */ +#define B3_Tah 0x0 /* 0clk */ +#define B3_Tacp 0x3 /* 6clk */ +#define B3_PMC 0x0 /* normal */
+#define B4_Tacs 0x0 /* 0clk */ +#define B4_Tcos 0x0 /* 0clk */ +#define B4_Tacc 0x7 /* 14clk */ +#define B4_Tcoh 0x0 /* 0clk */ +#define B4_Tah 0x0 /* 0clk */ +#define B4_Tacp 0x0 +#define B4_PMC 0x0 /* normal */
+#define B5_Tacs 0x0 /* 0clk */ +#define B5_Tcos 0x0 /* 0clk */ +#define B5_Tacc 0x7 /* 14clk */ +#define B5_Tcoh 0x0 /* 0clk */ +#define B5_Tah 0x0 /* 0clk */ +#define B5_Tacp 0x0 +#define B5_PMC 0x0 /* normal */
+#define B6_MT 0x3 /* SDRAM */ +#define B6_Trcd 0x1 +#define B6_SCAN 0x1 /* 9bit */
+#define B7_MT 0x3 /* SDRAM */ +#define B7_Trcd 0x1 /* 3clk */ +#define B7_SCAN 0x1 /* 9bit */
+/* REFRESH parameter */ +#define REFEN 0x1 /* Refresh enable */ +#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ +#define Trp 0x0 /* 2clk */ +#define Trc 0x3 /* 7clk */ +#define Tchr 0x2 /* 3clk */ +#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */ +/**************************************/ diff --git a/board/gec/gec2410/lowlevel_init.S b/board/gec/gec2410/lowlevel_init.S new file mode 100644 index 0000000..215aaad --- /dev/null +++ b/board/gec/gec2410/lowlevel_init.S @@ -0,0 +1,93 @@ +/*
- Memory Setup stuff - taken from blob memsetup.S
- Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- Modified for the Samsung SMDK2410 by
- (C) Copyright 2002
- David Mueller, ELSOFT AG, d.mueller@elsoft.ch
- Copyright (C) 2009 Hui Tang zetalabs@gmail.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <config.h> +#include <version.h> +#include "gec2410_mem.h"
+_TEXT_BASE:
- .word TEXT_BASE
+.globl lowlevel_init +lowlevel_init: +#if defined(CONFIG_NAND_SPL) || !defined(CONFIG_BOOT_NAND)
- /* memory control configuration */
- /* make r0 relative the current location so that it */
- /* reads SMRDATA out of FLASH rather than memory ! */
- ldr r0, =SMRDATA
- ldr r1, _TEXT_BASE
- sub r0, r0, r1
- ldr r1, =BWSCON /* Bus Width Status Controller */
- add r2, r0, #13*4
+0:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r2, r0
- bne 0b
+#endif /* CONFIG_NAND_SPL */
- /* everything is fine now */
- mov pc, lr
+/* dummy function, called by start_code() in cpu/arm920t/start.S */ +.globl coloured_LED_init +coloured_LED_init:
- mov pc, lr
+/* dummy function, called by start_code() in cpu/arm920t/start.S */ +.globl red_LED_on +red_LED_on:
- mov pc, lr
- .ltorg
+/* the literal pools origin */
+SMRDATA:
- .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12) \
- +(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
- .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8) \
- +(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
- .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8) \
- +(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
- .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8) \
- +(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
- .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8) \
- +(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
- .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8) \
- +(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
- .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8) \
- +(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x32
- .word 0x30
- .word 0x30
diff --git a/board/gec/gec2410/u-boot.lds b/board/gec/gec2410/u-boot.lds new file mode 100644 index 0000000..a30ece3 --- /dev/null +++ b/board/gec/gec2410/u-boot.lds @@ -0,0 +1,61 @@ +/*
- (C) Copyright 2002
- Gary Jennejohn, DENX Software Engineering, garyj@denx.de
- (C) Copyright 2008
- Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{
- . = 0x00000000;
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
- . = ALIGN(4);
- .data : { *(.data) }
- . = ALIGN(4);
- .got : { *(.got) }
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
- . = ALIGN(4);
- .mmudata : { *(.mmudata) }
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) . = ALIGN(4); }
- _end = .;
+} diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c index 20cedd4..6a067ae 100644 --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -186,9 +186,9 @@ ulong get_tbclk(void)
#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB) tbclk = timer_load_val * 100; -#elif defined(CONFIG_SBC2410X) || \
- defined(CONFIG_SMDK2410) || \
- defined(CONFIG_VCMA9)
+#elif defined(CONFIG_SYS_HZ) && \
- !defined(CONFIG_SMDK2400) && \
- !defined(CONFIG_TRAB)
tbclk = CONFIG_SYS_HZ; #else # error "tbclk not configured" diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 114427a..f0a0519 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -38,6 +38,7 @@
.globl _start _start: b start_code +#ifndef CONFIG_NAND_SPL ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -53,7 +54,13 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq +_pad: .word 0x12345678 /* now 16*4=64 */ +#else
- . = _start + 64
+#endif
+.global _end_vect +_end_vect: .balignl 16,0xdeadbeef
@@ -197,7 +204,11 @@ copy_loop:
/* Set up the stack */ stack_setup: +#ifndef CONFIG_NAND_SPL ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ +#else
- ldr r0, =(CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
+#endif sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ @@ -215,9 +226,13 @@ clbss_l:str r2, [r0] /* clear loop... */ cmp r0, r1 ble clbss_l
+#ifndef CONFIG_NAND_SPL ldr pc, _start_armboot
_start_armboot: .word start_armboot +#else
- b nand_boot
+#endif
/* @@ -234,6 +249,7 @@ _start_armboot: .word start_armboot
#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: +#ifndef CONFIG_NAND_SPL /* * flush v4 I/D caches */ @@ -250,6 +266,7 @@ cpu_init_crit: orr r0, r0, #0x00000002 @ set bit 2 (A) Align orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache mcr p15, 0, r0, c1, c0, 0 +#endif /* CONFIG_NAND_SPL */
/* * before relocating, we have to setup RAM timing @@ -264,6 +281,7 @@ cpu_init_crit: mov pc, lr #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#ifndef CONFIG_NAND_SPL /* ************************************************************************* * @@ -434,3 +452,4 @@ fiq: bl do_fiq
#endif +#endif /* CONFIG_NAND_SPL */ diff --git a/include/configs/gec2410.h b/include/configs/gec2410.h new file mode 100644 index 0000000..66c1593 --- /dev/null +++ b/include/configs/gec2410.h @@ -0,0 +1,249 @@ +/*
- (C) Copyright 2002
- Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- Marius Groeger mgroeger@sysgo.de
- Gary Jennejohn garyj@denx.de
- David Mueller d.mueller@elsoft.ch
- Configuation settings for the GD-Embedded Software Center GEC2410 board.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef __CONFIG_H +#define __CONFIG_H
+/*
- High Level Configuration Options
- (easy to change)
- */
+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ +#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ +#define CONFIG_GEC2410 1 /* on a GEC2410 Board */
+#define CONFIG_SYS_SDRAM_BASE 0x30000000
+/* input clock of PLL */ +#define CONFIG_SYS_CLK_FREQ 12000000 /* the GEC2410 has 12MHz input clock */
+#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#define CONFIG_ENABLE_MMU +#endif
+#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG
+#define USE_920T_MMU 1
+/*
- Size of malloc() pool
- */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128
+/*
- Hardware drivers
- */
+#define CONFIG_NET_MULTI +#define CONFIG_CS8900 /* we have a CS8900 on-board */ +#define CONFIG_CS8900_BASE 0x19000300 +#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
+/*
- select serial console configuration
- */
+#define CONFIG_S3C24X0_SERIAL 1 +#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on GEC2410 */
+/************************************************************
- RTC
- ************************************************************/
+#define CONFIG_RTC_S3C24X0 1
+/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE
+#define CONFIG_BAUDRATE 115200
+/*
- BOOTP options
- */
+#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME
+/*
- Command line configuration.
- */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_CACHE +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING
+/*
- Miscellaneous configurable options
- */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "GEC2410#" /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_MEMTEST_START \
- CONFIG_SYS_SDRAM_BASE /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END \
- (CONFIG_SYS_SDRAM_BASE + 0x3e00000) /* 62 MB in DRAM */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */ +#define CONFIG_SYS_HZ 1000
+/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/*-----------------------------------------------------------------------
- Stack sizes
- The stack sizes are set up in start.S using the settings below
- */
+#define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif
+/*-----------------------------------------------------------------------
- Physical Memory Map
- */
+#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define CONFIG_SYS_FLASH_BASE 0x00000000 +#define CONFIG_SYS_MONITOR_BASE 0x00000000 +#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
+/*-----------------------------------------------------------------------
- FLASH and environment organization
- */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
+#define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */ +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#define PHYS_FLASH_SIZE 0x00200000 /* 2MB */ +#define CONFIG_ENV_ADDR \
- (CONFIG_SYS_FLASH_BASE + 0x040000) /* addr of environment */
+/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT \
- (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
+#define CONFIG_SYS_FLASH_WRITE_TOUT \
- (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
+#define CONFIG_ENV_SIZE 0x020000 /* Total Size of Environment Parameters */
+/*
- GEC2410 board specific data
- */
+#define CONFIG_IDENT_STRING " for GEC2410"
+/* base address for uboot */ +#define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x03e00000)
+/* total memory available to uboot */ +#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024)
+/* Put environment copies after the end of U-Boot owned RAM */ +#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
+#ifdef CONFIG_ENABLE_MMU +#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 +#define CONFIG_BOOTCOMMAND "nand read 0xc0008000 0x60000 0x1a0000;" \
- "bootm 0xc0008000"
+#else +#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE +#define CONFIG_BOOTCOMMAND "nand read 0x30008000 0x60000 0x1a0000;" \
- "bootm 0x30008000"
+#endif
+/* NAND U-Boot load and start address */ +#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x03e00000) +#define CONFIG_ENV_OFFSET 0x0040000 /* Offset of Environment Sector */
+/* NAND configuration */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x4e00000c /* R/W NAND Flash data register */ +#define CONFIG_S3C2410_NAND_HWECC +#define CONFIG_S3C2410_NAND_BBT
+/* NUB load-addr */ +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE +/* NUB start-addr */ +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+/* Offset to RAM U-Boot image */ +#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) +/* Size of RAM U-Boot image */ +#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024)
+/* NAND chip page size */ +#define CONFIG_SYS_NAND_PAGE_SIZE 512 +/* NAND chip block size */ +#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) +/* NAND chip page per block count */ +#define CONFIG_SYS_NAND_PAGE_COUNT 32 +/* Location of the bad-block label */ +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 5 /* mark the 6th OOB byte */ +/* Extra address cycle for > 32MiB */ +#define CONFIG_SYS_NAND_4_ADDR_CYCLE 1 /* Fourth addr used (>32MB) */
+/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */ +#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE +/* Number of ECC bytes per OOB - S3C2410 calculates 4 bytes ECC in 1-bit mode */ +#define CONFIG_SYS_NAND_ECCBYTES 3 +/* Number of ECC-blocks per NAND page */ +#define CONFIG_SYS_NAND_ECCSTEPS \
- (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
+/* Size of a single OOB region */ +#define CONFIG_SYS_NAND_OOBSIZE 16 +/* Number of ECC bytes per page */ +#define CONFIG_SYS_NAND_ECCTOTAL \
- (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
+/* ECC byte positions */ +#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2} +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
+/* Boot configuration */ +#define CONFIG_BOOT_NAND +#define CONFIG_NAND +#define CONFIG_NAND_S3C2410 1
+/* Settings as above boot configuration */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_BOOTARGS "console=ttySAC,115200"
+#endif /* __CONFIG_H */ diff --git a/nand_spl/board/gec/gec2410/Makefile b/nand_spl/board/gec/gec2410/Makefile new file mode 100644 index 0000000..08d6de3 --- /dev/null +++ b/nand_spl/board/gec/gec2410/Makefile @@ -0,0 +1,105 @@ +# +# (C) Copyright 2006-2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+CONFIG_NAND_SPL = y +CONFIG_SKIP_RELOCATE_UBOOT = y
+# TEXT_BASE for SPL: +# On S3C2410 platforms the SPL is located in SRAM at 0. +#
+TEXT_BASE = 0
+sinclude $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk +sinclude $(TOPDIR)/config.mk
+LDSCRIPT = $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL -DCONFIG_SKIP_RELOCATE_UBOOT +CFLAGS += -DCONFIG_NAND_SPL -DCONFIG_SKIP_RELOCATE_UBOOT
+SOBJS = start.o lowlevel_init.o +COBJS = nand_boot.o s3c2410_nand.o
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+nandobj := $(OBJTREE)/nand_spl/
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+all: $(obj).depend $(ALL)
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
- -Map $(nandobj)u-boot-spl.map \
- -o $(nandobj)u-boot-spl
+$(nandobj)u-boot.lds: $(LDSCRIPT)
- $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+# create symbolic links for common files +# from cpu directory +$(obj)start.S:
- @rm -f $@
- @ln -s $(TOPDIR)/cpu/arm920t/start.S $@
+# from board directory +$(obj)lowlevel_init.S:
- @rm -f $@
- @ln -s $(TOPDIR)/board/gec/gec2410/lowlevel_init.S $@
+# from nand_spl directory +$(obj)nand_boot.c:
- @rm -f $@
- @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@
+# from drivers/mtd/nand directory +$(obj)s3c2410_nand.c:
- @rm -f $@
- @ln -s $(TOPDIR)/drivers/mtd/nand/s3c2410_nand.c $@
+#########################################################################
+$(obj)%.o: $(obj)%.S
- $(CC) $(AFLAGS) -c -o $@ $<
+$(obj)%.o: $(obj)%.c
- $(CC) $(CFLAGS) -c -o $@ $<
+include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/nand_spl/board/gec/gec2410/config.mk b/nand_spl/board/gec/gec2410/config.mk new file mode 100644 index 0000000..9b900b9 --- /dev/null +++ b/nand_spl/board/gec/gec2410/config.mk @@ -0,0 +1,32 @@ +# +# (C) Copyright 2006 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# +# GEC2410 Study Platform (gec2410) board
+# PAD_TO used to generate a 4kByte binary needed for the combined image +# -> PAD_TO = TEXT_BASE + 4096 +PAD_TO := 0x00001000
+ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff --git a/nand_spl/board/gec/gec2410/u-boot.lds b/nand_spl/board/gec/gec2410/u-boot.lds new file mode 100644 index 0000000..5871f7e --- /dev/null +++ b/nand_spl/board/gec/gec2410/u-boot.lds @@ -0,0 +1,60 @@ +/*
- (C) Copyright 2002
- Gary Jennejohn, DENX Software Engineering, garyj@denx.de
- (C) Copyright 2008
- Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{
- . = 0x00000000;
- . = ALIGN(4);
- .text :
- {
- start.o (.text)
- nand_boot.o (.text)
- *(.text)
- }
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
- . = ALIGN(4);
- .data : { *(.data) }
- . = ALIGN(4);
- .got : { *(.got) }
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) . = ALIGN(4); }
- _end = .;
+}
1.6.3.3
You already sent v2 patch. please resend v3 patch.
and please see my comment. http://lists.denx.de/pipermail/u-boot/2009-November/064051.html
Thanks Minkyu Kang