
On Tue, Apr 02, 2013 at 06:05:57PM +0200, Andreas Bie??mann wrote:
The BCH for OMAP3 is implemented as the linux kernel in 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c does.
The kernel states:
---8<--- The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. --->8---
And we do so in u-boot.
This implementation uses the same layout for BCH8 but it is fix. The current provided layout does only work with 64 Byte OOB.
Signed-off-by: Andreas Bie??mann andreas.devel@googlemail.com Cc: Tom Rini trini@ti.com Cc: Ilya Yanok ilya.yanok@cogentembedded.com Cc: Scott Wood scottwood@freescale.com Cc: Mansoor Ahamed mansoor.ahamed@ti.com
since v1:
- cleanups (remove debug stuff)
- make checkpach clean (still 2 warnings which I will not fix)
- merge some code with the AM33XX implementation
known checkpatch errors: WARNING: line over 80 characters #92: FILE: drivers/mtd/nand/omap_gpmc.c:273: +static void __maybe_unused omap_hwecc_init_bch(struct nand_chip *chip, int32_t mode)
WARNING: line over 80 characters #165: FILE: drivers/mtd/nand/omap_gpmc.c:346: +static void __maybe_unused omap_enable_ecc_bch(struct mtd_info *mtd, int32_t mode)
total: 0 errors, 2 warnings, 0 checks, 428 lines checked
Please correct these.
- default:
/* by default eccsize0 selected for ecc1resultsize */
/* eccsize0 config */
/* * Like this. */
- /* by default 512bytes sector page is selected */
Insert a newline here since this isn't a multi-line comment, but a general note, followed by comments about what's going on.
- /* set bch mode */
- val = (1 << 16);
So newline between these blocks
- /* bch4 / bch8 / bch16 */
- val |= (bch->type << 12);
- val |= (wr_mode << 8);
- val |= (dev_width << 7);
- val |= (cs << 1);
And here.
- debug("set ECC_CONFIG=0x%08x\n", val);
- writel(val, &gpmc_cfg->ecc_config);
+}
And I see these are copied style problems.