7 Jan
2016
7 Jan
'16
5:50 p.m.
On 05/01/2016 20:02, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@nxp.com
As per the AR8031 datasheet:
"For a reliable power on reset, suggest to keep asserting the reset low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms requirement is satisfied."
So do as suggested and also add a 100us delay after deasserting the reset line to guarantee that the PHY ID can be read correctly and the Atheros 8031 PHY driver can be loaded automatically.
This results in a simpler code.
Signed-off-by: Fabio Estevam fabio.estevam@nxp.com
Applied (fix) to u-boot-imx, thanks !
Best regards, Stefano Babic
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