--- Wolfgang Denk wd@denx.de 的正文：> In message
When porting u-boot on LITE_DW,I found that the following code in RPXlite.c couldn't get through.I
Can you please be a bit more specific? What does "couldn't get through" mean? Bad results? Crash? Which error / crash dump messages?
I did a test again and get the following result:
(gdb) b dram_size Breakpoint 6 at 0xff012f38: file RPXlite.c, line 199. (gdb) c
Breakpoint 6, dram_size (mamr_value=546328576, base=0x0, maxsize=67108864) at RPXlite.c:199 (gdb) d b (gdb) step (gdb) step (gdb) step (gdb) step (gdb) step (gdb) step (gdb) step
Program received signal SIGSTOP, Stopped (signal). 0x00001000 in ?? () (gdb)
By DDD,I could see the code executed to the following cycle and hanged after one cycle.At the same time,cnt and maxsize equal to 16777216 and 67108864 respectively.
for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) { addr = base + cnt; /* pointer arith! */ save[i++] = *addr; *addr = ~cnt; }
[maxsize/sizeof(long)]/2.I changed save[]
dimension to
big enough but still in vain.I don't know why.Finally,I masked the following code and booted
How big is your SDRAM_MAX_SIZE #defined? And how big is your actual RAM?
I set SDRAM_MAX_SIZE as 0x04000000 according to two MT48LC16M16A2TG－75 on LITE_DW.
successfully.How does the following code work normally?If I masked the code,is there any potential danger?
The code works fine on all systems I know. If you remove it, you lose the feature that U-Boot itself to different RAM sizes.
Thank you for your notes.Actually,I cannot help suspect that address multiplexing on LITE_DW makes the problems.I notice that A6mpc is connected to A12sd but A8mpc and A7mpc linking BA0sd and BA1sd on LITE_DW.Some documents from Micron Technical Notes,howerever, say the MSB for the SDRAM are the bank address lines BA1 and BA0.I am a little confused by these authoritative reference.Which one is better for practice?Is it related with above phenomenon?
Best regards,
Sam Song
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