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On 02/05/2013 03:48 AM, Markus Brunner wrote:
Hi, for mDDR to work mddr_sel (bit 28) of ddrctrl->ddrioctrl has to be set. There is no way of telling config_ddr(unsigned int pll, unsigned int ioctrl, ...) my desired value, it won't be set atm.
From the 1.3kB ddr_ctrl struct only 2 registers are defined, which is fine if it's used memory mapped, however it makes it unsuitable for passing values in the SPL. So at first glance I would extend config_ddr() with an additional register value, because guessing the ddr type from the values of the other parameters is, in addition to being hackish, not guaranteed to work with every weired ram configuration. However might it be possible, that the second value of config_ddr() should not hold the value for config_io_ctrl(), but the value of my desired ddrctrl->ddrioctrl? The wiki [1] from TI says that the first should _always_ be 0x18B, whereas the second needs to be set depending on the mem type. We are talking about a set of registers named DDR_*_IOCTRL and a single register called DDR_IO_CTRL, so easy to mix up.
Ragards, Markus
[1] http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
Hadn't
seen that wiki page before, thanks. So a problem right now is that yes, I hadn't seen "in the wild" anything but DDR2 or DDR3 designs. I'm going to assume that on your custom hardware you are not doing the EEPROM-based board detection method that the TI boards do. We should try and lay things out so that boards where we can run-time say "we are on board X (rev Y) and must have ..." can all out the same functions for boards where we simply have to set that at build time (until we get to the some-day of using a device tree or something like that perhaps).
- -- Tom