Convert dma_alloc_coherent to use memalign.
Signed-off-by: Thomas Chou thomas@wytron.com.tw --- v2 use memalign.
arch/nios2/include/asm/dma-mapping.h | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h index 1350e3b..e3a338d 100644 --- a/arch/nios2/include/asm/dma-mapping.h +++ b/arch/nios2/include/asm/dma-mapping.h @@ -1,23 +1,18 @@ #ifndef __ASM_NIOS2_DMA_MAPPING_H #define __ASM_NIOS2_DMA_MAPPING_H
-/* dma_alloc_coherent() return cache-line aligned allocation which is mapped +#include <asm/io.h> + +/* + * dma_alloc_coherent() return cache-line aligned allocation which is mapped * to uncached io region. - * - * IO_REGION_BASE should be defined in board config header file - * 0x80000000 for nommu, 0xe0000000 for mmu */ - static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) { - void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE); - if (!addr) - return 0; - flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE); - *handle = ((unsigned long)addr + - (CONFIG_SYS_DCACHELINE_SIZE - 1)) & - ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE); - return (void *)(*handle | IO_REGION_BASE); + *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len); + flush_dcache_range(*handle, *handle + len); + + return ioremap(*handle, len); }
#endif /* __ASM_NIOS2_DMA_MAPPING_H */