Pandora is using both SDRC CSes. The MUX setting is needed for the second CS clock signal to allow the 2 RAM parts to be put in self-refresh correctly.
Based on similar patch for beagle and overo by Jean Pihet and Steve Sakoman. --- board/omap3/pandora/pandora.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board/omap3/pandora/pandora.h b/board/omap3/pandora/pandora.h index dfaf32f..f06ee5b 100644 --- a/board/omap3/pandora/pandora.h +++ b/board/omap3/pandora/pandora.h @@ -396,6 +396,6 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/
#endif