Minor changes to support T124 chip and sku IDs.
Change-Id: I44092a2ec558e01952be8cc7c0534e384a810ffd Signed-off-by: Tom Warren twarren@nvidia.com --- arch/arm/include/asm/arch-tegra/gp_padctrl.h | 1 + arch/arm/include/asm/arch-tegra/tegra.h | 2 ++ 2 files changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-tegra/gp_padctrl.h b/arch/arm/include/asm/arch-tegra/gp_padctrl.h index c840c08..7a86acb 100644 --- a/arch/arm/include/asm/arch-tegra/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra/gp_padctrl.h @@ -20,5 +20,6 @@ #define CHIPID_TEGRA20 0x20 #define CHIPID_TEGRA30 0x30 #define CHIPID_TEGRA114 0x35 +#define CHIPID_TEGRA124 0x40
#endif /* _TEGRA_GP_PADCTRL_H_ */ diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index 25d1fc4..3b3e016 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -67,6 +67,7 @@ enum { SKU_ID_T30 = 0x81, /* Cardhu value */ SKU_ID_T114_ENG = 0x00, /* Dalmore value, unfused */ SKU_ID_T114_1 = 0x01, + SKU_ID_T124_ENG = 0x00, /* Venice2 value, unfused */ };
/* @@ -80,6 +81,7 @@ enum { TEGRA_SOC_T25, TEGRA_SOC_T30, TEGRA_SOC_T114, + TEGRA_SOC_T124,
TEGRA_SOC_CNT, TEGRA_SOC_UNKNOWN = -1,