Add SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can be disabled in SPL if necessary. This may be necessary due to e.g. size constraints of the SPL.
Signed-off-by: Marek Vasut marex@denx.de --- Cc: Angelo Dureghello angelo@kernel-space.org Cc: Emanuele Ghidoli emanuele.ghidoli@toradex.com Cc: Fabio Estevam festevam@gmail.com Cc: Gaurav Jain gaurav.jain@nxp.com Cc: Heinrich Schuchardt xypron.glpk@gmx.de Cc: Marek Vasut marex@denx.de Cc: Michal Simek michal.simek@amd.com Cc: Simon Glass sjg@chromium.org Cc: Stefan Roese sr@denx.de Cc: Sughosh Ganu sughosh.ganu@linaro.org Cc: Svyatoslav Ryhel clamor95@gmail.com Cc: Tim Harvey tharvey@gateworks.com Cc: Tom Rini trini@konsulko.com Cc: u-boot@lists.denx.de --- drivers/crypto/fsl/Kconfig | 7 +++++++ drivers/crypto/fsl/Makefile | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/fsl/Kconfig b/drivers/crypto/fsl/Kconfig index 294e1c8a44e..9f58731bb67 100644 --- a/drivers/crypto/fsl/Kconfig +++ b/drivers/crypto/fsl/Kconfig @@ -78,6 +78,13 @@ config FSL_CAAM_RNG using the prediction resistance flag which means the DRGB is reseeded from the TRNG every time random data is generated.
+config SPL_FSL_CAAM_RNG + bool "Enable CAAM Random Number Generator support in SPL" + depends on SPL_DM_RNG + help + This option is an SPL-variant of the FSL_CAAM_RNG option. + See the help of FSL_CAAM_RNG for details. + endif
config FSL_DCP_RNG diff --git a/drivers/crypto/fsl/Makefile b/drivers/crypto/fsl/Makefile index 7a2543e16cc..4fbce519a0b 100644 --- a/drivers/crypto/fsl/Makefile +++ b/drivers/crypto/fsl/Makefile @@ -6,6 +6,6 @@ obj-y += sec.o obj-$(CONFIG_FSL_CAAM) += jr.o fsl_hash.o jobdesc.o error.o obj-$(CONFIG_CMD_BLOB)$(CONFIG_IMX_CAAM_DEK_ENCAP) += fsl_blob.o obj-$(CONFIG_RSA_FREESCALE_EXP) += fsl_rsa.o -obj-$(CONFIG_FSL_CAAM_RNG) += rng.o +obj-$(CONFIG_$(SPL_TPL_)FSL_CAAM_RNG) += rng.o obj-$(CONFIG_FSL_DCP_RNG) += dcp_rng.o obj-$(CONFIG_FSL_MFGPROT) += fsl_mfgprot.o