Before a kernel boots, GPIO, SYS-DMAC, QSPI and MSIOF clock is halted.
Signed-off-by: Hisashi Nakamura hisashi.nakamura.ak@renesas.com Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- board/renesas/lager/lager.c | 43 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 47cf51b..077a78f 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -67,10 +67,49 @@ int board_early_init_f(void) return 0; }
+static struct mstp_ctl { + u32 s_addr; + u32 s_dis; + u32 s_ena; + u32 r_addr; + u32 r_dis; + u32 r_ena; +} mstptbl[] = { + [0] = { SMSTPCR0, 0x00640801, 0x00400001, + RMSTPCR0, 0x00640801, 0x00000000 }, + [1] = { SMSTPCR1, 0xDB6E9BDF, 0x00000000, + RMSTPCR1, 0xDB6E9BDF, 0x00000000 }, + [2] = { SMSTPCR2, 0x300DA1FC, 0x000CA120, + RMSTPCR2, 0x300DA1FC, 0x00000000 }, + [3] = { SMSTPCR3, 0xF08CF831, 0x00000000, + RMSTPCR3, 0xF08CF831, 0x00000000 }, + [4] = { SMSTPCR4, 0x80000184, 0x00000180, + RMSTPCR4, 0x80000184, 0x00000000 }, + [5] = { SMSTPCR5, 0x44C00046, 0x00000000, + RMSTPCR5, 0x44C00046, 0x00000000 }, + [7] = { SMSTPCR7, 0x07F30718, 0x00200000, + RMSTPCR7, 0x07F30718, 0x00000000 }, + [8] = { SMSTPCR8, 0x01F0FF84, 0x00000000, + RMSTPCR8, 0x01F0FF84, 0x00000000 }, + [9] = { SMSTPCR9, 0xF5979FCF, 0x00021F80, + RMSTPCR9, 0xF5979FCF, 0x00001F80 }, + [10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000, + RMSTPCR10, 0xFFFEFFE0, 0x00000000 }, + [11] = { SMSTPCR11, 0x00000000, 0x00000000, + RMSTPCR11, 0x00000000, 0x00000000 }, +}; + void arch_preboot_os(void) { - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + int i; + + /* Stop all module clock */ + for (i = 0; i < ARRAY_SIZE(mstptbl); i++) { + mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_addr, + mstptbl[i].s_dis, mstptbl[i].s_ena); + mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_addr, + mstptbl[i].r_dis, mstptbl[i].r_ena); + } }
DECLARE_GLOBAL_DATA_PTR;